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/openbmc/linux/drivers/phy/qualcomm/
H A Dphy-qcom-edp.c87 void __iomem *edp; member
175 struct qcom_edp *edp = phy_get_drvdata(phy); in qcom_edp_phy_init() local
176 const struct qcom_edp_cfg *cfg = edp->cfg; in qcom_edp_phy_init()
180 ret = regulator_bulk_enable(ARRAY_SIZE(edp->supplies), edp->supplies); in qcom_edp_phy_init()
184 ret = clk_bulk_prepare_enable(ARRAY_SIZE(edp->clks), edp->clks); in qcom_edp_phy_init()
190 edp->edp + DP_PHY_PD_CTL); in qcom_edp_phy_init()
193 writel(0x17, edp->pll + QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN); in qcom_edp_phy_init()
195 writel(DP_PHY_PD_CTL_PSR_PWRDN, edp->edp + DP_PHY_PD_CTL); in qcom_edp_phy_init()
201 edp->edp + DP_PHY_PD_CTL); in qcom_edp_phy_init()
208 writel(0xfc, edp->edp + DP_PHY_MODE); in qcom_edp_phy_init()
[all …]
/openbmc/u-boot/drivers/video/rockchip/
H A Drk_edp.c291 static int rk_edp_link_power_up(struct rk_edp_priv *edp) in rk_edp_link_power_up() argument
297 if (edp->link_train.revision < 0x11) in rk_edp_link_power_up()
300 ret = rk_edp_dpcd_read(edp->regs, DPCD_LINK_POWER_STATE, &value, 1); in rk_edp_link_power_up()
307 ret = rk_edp_dpcd_write(edp->regs, DPCD_LINK_POWER_STATE, &value, 1); in rk_edp_link_power_up()
321 static int rk_edp_link_configure(struct rk_edp_priv *edp) in rk_edp_link_configure() argument
325 values[0] = edp->link_train.link_rate; in rk_edp_link_configure()
326 values[1] = edp->link_train.lane_count; in rk_edp_link_configure()
328 return rk_edp_dpcd_write(edp->regs, DPCD_LINK_BW_SET, values, in rk_edp_link_configure()
332 static void rk_edp_set_link_training(struct rk_edp_priv *edp, in rk_edp_set_link_training() argument
337 for (i = 0; i < edp->link_train.lane_count; i++) in rk_edp_set_link_training()
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H A DKconfig17 (LVDS), embedded DisplayPort (eDP) and Display Serial Interface (DSI).
43 bool "EDP Port"
46 This enables Embedded DisplayPort(EDP) display support.
/openbmc/linux/drivers/gpu/drm/gma500/
H A Dintel_bios.c48 struct bdb_edp *edp; in parse_edp() local
53 edp = find_section(bdb, BDB_EDP); in parse_edp()
55 dev_priv->edp.bpp = 18; in parse_edp()
56 if (!edp) { in parse_edp()
57 if (dev_priv->edp.support) { in parse_edp()
58 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported, assume %dbpp panel color depth.\n", in parse_edp()
59 dev_priv->edp.bpp); in parse_edp()
65 switch ((edp->color_depth >> (panel_type * 2)) & 3) { in parse_edp()
67 dev_priv->edp.bpp = 18; in parse_edp()
70 dev_priv->edp.bpp = 24; in parse_edp()
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H A Dcdv_intel_dp.c274 struct drm_display_mode *panel_fixed_mode; /* for eDP */
304 * is_edp - is the given port attached to an eDP panel (either CPU or PCH)
307 * If a CPU or PCH DP output is attached to an eDP panel, this function
429 DRM_DEBUG_KMS("Error in Powering up eDP panel, status %x\n", REG_READ(PP_STATUS)); in cdv_intel_edp_panel_on()
478 * on, we may see slight flicker as the panel syncs with the eDP in cdv_intel_edp_backlight_on()
523 /* only refuse the mode on non eDP since we have seen some weird eDP panels in cdv_intel_dp_mode_valid()
526 (cdv_intel_dp_link_required(mode->clock, dev_priv->edp.bpp) in cdv_intel_dp_mode_valid()
908 bpp = dev_priv->edp.bpp; in cdv_intel_dp_mode_fixup()
1012 bpp = dev_priv->edp.bpp; in cdv_intel_dp_set_m_n()
1139 int edp = is_edp(intel_encoder); in cdv_intel_dp_prepare() local
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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,edp-phy.yaml5 $id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#
8 title: Qualcomm eDP PHY
14 The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides
20 - qcom,sc7280-edp-phy
21 - qcom,sc8180x-edp-phy
23 - qcom,sc8280xp-edp-phy
65 compatible = "qcom,sc8180x-edp-phy";
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_aux_backlight.c113 /* Intel EDP backlight callbacks */
143 * do not use Intel proprietary eDP backlight control if we in intel_dp_aux_supports_hdr_backlight()
159 panel->backlight.edp.intel.sdr_uses_aux = in intel_dp_aux_supports_hdr_backlight()
181 if (!panel->backlight.edp.intel.sdr_uses_aux) { in intel_dp_aux_hdr_get_backlight()
224 if (panel->backlight.edp.intel.sdr_uses_aux) { in intel_dp_aux_hdr_set_backlight()
254 if (panel->backlight.edp.intel.sdr_uses_aux) { in intel_dp_aux_hdr_enable_backlight()
278 if (panel->backlight.edp.intel.sdr_uses_aux) in intel_dp_aux_hdr_disable_backlight()
301 dpcd_vs_pwm_str(panel->backlight.edp.intel.sdr_uses_aux)); in intel_dp_aux_hdr_setup_backlight()
303 if (!panel->backlight.edp.intel.sdr_uses_aux) { in intel_dp_aux_hdr_setup_backlight()
345 if (!panel->backlight.edp.vesa.info.aux_set) { in intel_dp_aux_vesa_set_backlight()
[all …]
/openbmc/linux/drivers/gpu/drm/tegra/
H A Ddp.h52 * eDP alternate scrambler reset capability
116 * @edp: eDP revision (0x11: eDP 1.1, 0x12: eDP 1.2, ...)
119 * @rates: additional supported link rates in kHz (eDP 1.4)
120 * @num_rates: number of additional supported link rates (eDP 1.4)
138 unsigned char edp; member
/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-edp.yaml4 $id: http://devicetree.org/schemas/display/panel/panel-edp.yaml#
7 title: Probeable (via DP AUX / EDID) eDP Panels with simple poweron sequences
13 This binding file can be used to indicate that an eDP panel is connected
26 One piece of information about eDP panels that is typically _not_
29 list eDP panels. We solve that here with two tricks. The "worst case"
35 eDP panels in general can have somewhat arbitrary power sequencing
46 the eDP Standard.
53 eDP -----------+ Black video | Src vid | Blk vid +
89 const: edp-panel
109 hooked up directly to the eDP controller.
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/openbmc/u-boot/drivers/video/bridge/
H A DKconfig6 another. For example, where the SoC only supports eDP and the LCD
7 requires LVDS, an eDP->LVDS bridge chip can be used to provide the
16 to be connected to an eDP output device such as an SoC that lacks
26 to an eDP output device such as an SoC that lacks LVDS capability,
34 The Analogix ANX6345 is RGB-to-DP converter. It enables an eDP LCD
/openbmc/linux/include/drm/display/
H A Ddrm_dp.h35 * eDP: Embedded DisplayPort version 1
40 * 1.2 formally includes both eDP and DPI definitions.
145 # define DP_MSA_TIMING_PAR_IGNORED (1 << 6) /* eDP */
168 # define DP_DPCD_DISPLAY_CONTROL_CAPABLE (1 << 3) /* edp v1.2 or higher */
178 #define DP_SUPPORTED_LINK_RATES 0x010 /* eDP 1.4 */
232 #define DP_RECEIVER_ALPM_CAP 0x02e /* eDP 1.4 */
235 #define DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP 0x02f /* eDP 1.4 */
285 #define DP_DSC_MAX_BITS_PER_PIXEL_LOW 0x067 /* eDP 1.4 */
287 #define DP_DSC_MAX_BITS_PER_PIXEL_HI 0x068 /* eDP 1.4 */
289 # define DP_DSC_MAX_BPP_DELTA_VERSION_MASK (0x3 << 5) /* eDP 1.5 & DP 2.0 */
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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dtoshiba,tc358767.yaml7 title: Toshiba TC358767/TC358867/TC9595 DSI/DPI/eDP bridge
14 converts DSI/DPI to eDP/DP .
97 eDP/DP output port. The remote endpoint phandle should be a
98 reference to a valid eDP panel input endpoint node. This port is
121 /* DPI input and eDP output */
127 edp-bridge@68 {
164 edp-bridge@68 {
H A Dps8640.yaml7 title: MIPI DSI to eDP Video Format Converter
13 The PS8640 is a low power MIPI-to-eDP video format converter supporting
17 device outputs eDP v1.4, one or two lanes, at a link rate of up to
57 Video port for eDP output (panel or connector).
80 ps8640: edp-bridge@18 {
H A Danx6345.yaml7 title: Analogix ANX6345 eDP Transmitter
13 The ANX6345 is an ultra-low power Full-HD eDP transmitter designed for
46 Video port for eDP output (panel or connector).
/openbmc/linux/drivers/gpu/drm/bridge/
H A DKconfig199 NXP PTN3460 eDP-LVDS bridge chip driver.
202 tristate "Parade eDP/LVDS bridge"
208 Parade eDP-LVDS bridge chip driver.
211 tristate "Parade PS8640 MIPI DSI to eDP Converter"
222 MIPI DSI to eDP converter
298 tristate "Toshiba TC358767 eDP bridge"
307 Toshiba TC358767 eDP bridge chip driver.
366 tristate "TI SN65DSI86 DSI to eDP bridge"
377 Texas Instruments SN65DSI86 DSI to eDP Bridge driver
/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Ddp-controller.yaml22 - qcom,sc7280-edp
24 - qcom,sc8180x-edp
26 - qcom,sc8280xp-edp
153 # p1 regions is present on DP, but not on eDP
159 - qcom,sc7280-edp
160 - qcom,sc8180x-edp
161 - qcom,sc8280xp-edp
H A Dqcom,sc7280-mdss.yaml65 "^edp@[0-9a-f]+$":
69 const: qcom,sc7280-edp
77 - qcom,sc7280-edp-phy
260 edp@aea0000 {
261 compatible = "qcom,sc7280-edp";
336 compatible = "qcom,sc7280-edp-phy";
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc7180-trogdor-parade-ps8640.dtsi3 * Google Trogdor dts fragment for the boards with Parade ps8640 edp bridge
41 * extra power cycle of the touchscreen and eDP panel at bootup.
106 edp_brij_ps8640_rst: edp-brij-ps8640-rst-state {
113 en_pp3300_edp_brij_ps8640: en-pp3300-edp-brij-ps8640-state {
H A Dsc7180-trogdor-ti-sn65dsi86.dtsi3 * Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge
22 * extra power cycle of the touchscreen and eDP panel at bootup.
99 edp_brij_irq: edp-brij-irq-state {
/openbmc/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,dp.yaml14 MediaTek DP and eDP are different hardwares and there are some features
15 which are not supported for eDP. For example, audio is not supported for
16 eDP. Therefore, we need to use two different compatibles to describe them.
25 - mediatek,mt8195-edp-tx
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-daemons/lldpd/
H A Dlldpd_1.0.19.bb31 PACKAGECONFIG ??= "cdp fdp edp sonmp lldpmed dot1 dot3"
38 PACKAGECONFIG[edp] = "--enable-edp,--disable-edp"
/openbmc/linux/Documentation/gpu/
H A Dtegra.rst103 longer do and instead provide standard interfaces such as DSI and eDP/DP.
111 the more standard DSI and eDP interfaces.
117 by the versatile SOR output, which supports eDP, DP and HDMI. The SOR is able
128 eDP/DP
131 eDP was first introduced in Tegra124 where it was used to drive the display
/openbmc/u-boot/arch/arm/dts/
H A Dsun50i-a64-pinebook-u-boot.dtsi9 /* The ANX6345 eDP-bridge is on r_i2c */
11 anx6345: edp-bridge@38 {
/openbmc/linux/drivers/gpu/drm/rockchip/
H A Danalogix_dp-rockchip.c46 * @lcdsel_big: reg value of selecting vop big for eDP
47 * @lcdsel_lit: reg value of selecting vop little for eDP
129 /* VOP couldn't output YUV video format for eDP rightly */ in rockchip_dp_get_modes()
251 * format to eDP controller, and if eDP panel only support RGB8, in rockchip_dp_drm_encoder_atomic_check()
252 * then eDP controller should cut down the video data, not via VOP in rockchip_dp_drm_encoder_atomic_check()
475 {.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },
/openbmc/linux/arch/x86/boot/
H A Dedd.c131 struct edd_info ei, *edp; in query_edd() local
147 edp = boot_params.eddbuf; in query_edd()
167 memcpy(edp, &ei, sizeof(ei)); in query_edd()
168 edp++; in query_edd()

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