Searched +full:edma2 +full:- +full:err (Results 1 – 4 of 4) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/dma/ |
H A D | fsl,edma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 memory-mapped registers. channels are split into two groups, called 16 - Peng Fan <peng.fan@nxp.com> 21 - enum: 22 - fsl,vf610-edma 23 - fsl,imx7ulp-edma 24 - fsl,imx8qm-adma 25 - fsl,imx8qm-edma [all …]
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/openbmc/linux/drivers/dma/ |
H A D | fsl-edma-main.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * drivers/dma/fsl-edma.c 5 * Copyright 2013-2014 Freescale Semiconductor, Inc. 12 #include <dt-bindings/dma/fsl-edma.h> 22 #include <linux/dma-mapping.h> 26 #include "fsl-edma-common.h" 32 vchan_synchronize(&fsl_chan->vchan); in fsl_edma_synchronize() 39 struct edma_regs *regs = &fsl_edma->regs; in fsl_edma_tx_handler() 41 intr = edma_readl(fsl_edma, regs->intl); in fsl_edma_tx_handler() 45 for (ch = 0; ch < fsl_edma->n_chans; ch++) { in fsl_edma_tx_handler() [all …]
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/openbmc/linux/drivers/clk/imx/ |
H A D | clk-imx93.c | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <linux/clk-provider.h> 7 #include <linux/err.h> 14 #include <dt-bindings/clock/imx93-clock.h> 175 { IMX93_CLK_EDMA2_GATE, "edma2", "wakeup_axi_root", 0x8580, }, 262 struct device *dev = &pdev->dev; in imx93_clocks_probe() 263 struct device_node *np = dev->of_node; in imx93_clocks_probe() 272 return -ENOMEM; in imx93_clocks_probe() 274 clk_hw_data->num = IMX93_CLK_END; in imx93_clocks_probe() 275 clks = clk_hw_data->hws; in imx93_clocks_probe() [all …]
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/openbmc/linux/drivers/accel/habanalabs/gaudi2/ |
H A D | gaudi2.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright 2020-2022 HabanaLabs, Ltd. 45 * since the code already has built-in support for binning of up to MAX_FAULTY_TPCS TPCs 127 #define GAUDI2_PMMU_SPI_SEI_ENABLE_MASK GENMASK(GAUDI2_NUM_OF_MMU_SPI_SEI_CAUSE - 2, 0) 128 #define GAUDI2_HMMU_SPI_SEI_ENABLE_MASK GENMASK(GAUDI2_NUM_OF_MMU_SPI_SEI_CAUSE - 1, 0) 132 #define GAUDI2_VDEC_MSIX_ENTRIES (GAUDI2_IRQ_NUM_SHARED_DEC1_ABNRM - \ 135 #define ENGINE_ID_DCORE_OFFSET (GAUDI2_DCORE1_ENGINE_ID_EDMA_0 - GAUDI2_DCORE0_ENGINE_ID_EDMA_0) 165 /* HW scrambles only bits 0-25 */ 287 GAUDI2_DCORE1_ENGINE_ID_EDMA_0, "EDMA2"}, 903 "wap sei (wbc axi err)", [all …]
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