/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-popmetal.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com> 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 11 model = "PopMetal-RK3288"; 12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288"; 19 ext_gmac: external-gmac-clock { 20 compatible = "fixed-clock"; 21 clock-frequency = <125000000>; 22 clock-output-names = "ext_gmac"; [all …]
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H A D | rk3288-firefly.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/input/input.h> 15 adc-keys { 16 compatible = "adc-keys"; 17 io-channels = <&saradc 1>; 18 io-channel-names = "buttons"; 19 keyup-threshold-microvolt = <1800000>; 21 button-recovery { 24 press-threshold-microvolt = <0>; 28 dovdd_1v8: dovdd-1v8-regulator { [all …]
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H A D | rk3288-firefly-reload.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include "rk3288-firefly-reload-core.dtsi" 11 model = "Firefly-RK3288-reload"; 12 compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288"; 14 adc-keys { 15 compatible = "adc-keys"; 16 io-channels = <&saradc 1>; 17 io-channel-names = "buttons"; 18 keyup-threshold-microvolt = <1800000>; [all …]
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H A D | rk3288-rock2-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/pwm/pwm.h> 12 emmc_pwrseq: emmc-pwrseq { 13 compatible = "mmc-pwrseq-emmc"; 14 pinctrl-0 = <&emmc_reset>; 15 pinctrl-names = "default"; 16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; 19 ext_gmac: external-gmac-clock { 20 compatible = "fixed-clock"; 21 #clock-cells = <0>; [all …]
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H A D | rk3288-firefly-reload-core.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/input.h> 16 ext_gmac: external-gmac-clock { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 19 clock-frequency = <125000000>; 20 clock-output-names = "ext_gmac"; 24 vcc_flash: flash-regulator { 25 compatible = "regulator-fixed"; 26 regulator-name = "vcc_flash"; [all …]
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H A D | rk3288-phycore-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device tree file for Phytec phyCORE-RK3288 SoM 8 #include <dt-bindings/net/ti-dp83867.h> 13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288"; 29 ext_gmac: external-gmac-clock { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <125000000>; 33 clock-output-names = "ext_gmac"; 36 leds: user-leds { [all …]
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H A D | rk3288-vyasa.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 10 model = "Amarula Vyasa-RK3288"; 11 compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; 14 stdout-path = &uart2; 22 dc12_vbat: dc12-vbat { 23 compatible = "regulator-fixed"; 24 regulator-name = "dc12_vbat"; 25 regulator-min-microvolt = <12000000>; 26 regulator-max-microvolt = <12000000>; [all …]
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H A D | rk3288-veyron.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/clock/rockchip,rk808.h> 9 #include <dt-bindings/input/input.h> 18 stdout-path = "serial2:115200n8"; 31 power_button: power-button { 32 compatible = "gpio-keys"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&pwr_key_l>; 36 key-power { 40 debounce-interval = <100>; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | rk3288-popmetal.dtsi | 2 * This file is dual-licensed: you can use it either under the terms 49 ext_gmac: external-gmac-clock { 50 compatible = "fixed-clock"; 51 clock-frequency = <125000000>; 52 clock-output-names = "ext_gmac"; 53 #clock-cells = <0>; 56 gpio-keys { 57 compatible = "gpio-keys"; 60 pinctrl-names = "default"; 61 pinctrl-0 = <&pwrbtn>; [all …]
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H A D | rk3288-phycore-som.dtsi | 2 * Device tree file for Phytec phyCORE-RK3288 SoM 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/net/ti-dp83867.h> 50 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288"; 67 ext_gmac: external-gmac-clock { 68 compatible = "fixed-clock"; 69 #clock-cells = <0>; 70 clock-frequency = <125000000>; 71 clock-output-names = "ext_gmac"; 75 compatible = "rockchip,rk3288-io-voltage-domain"; [all …]
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H A D | rk3288-veyron.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/rockchip,rk808.h> 9 #include <dt-bindings/input/input.h> 18 stdout-path = &uart2; 22 u-boot,dm-pre-reloc; 23 u-boot,boot0 = &spi_flash; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&fw_wp_ap>; 30 write-protect-gpio = <&gpio7 6 GPIO_ACTIVE_LOW>; 35 compatible = "pwm-backlight"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/power/ |
H A D | rockchip-io-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 42 to report their voltage. The IO Voltage Domain for any non-specified 48 - rockchip,px30-io-voltage-domain 49 - rockchip,px30-pmu-io-voltage-domain 50 - rockchip,rk3188-io-voltage-domain 51 - rockchip,rk3228-io-voltage-domain [all …]
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/openbmc/linux/drivers/soc/rockchip/ |
H A D | io-domain.c | 1 // SPDX-License-Identifier: GPL-2.0-only 26 * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the 28 * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider 71 int (*write)(struct rockchip_iodomain_supply *supply, int uV); 79 int (*write)(struct rockchip_iodomain_supply *supply, int uV); 82 static int rk3568_iodomain_write(struct rockchip_iodomain_supply *supply, int uV) in rk3568_iodomain_write() argument 84 struct rockchip_iodomain *iod = supply->iod; in rk3568_iodomain_write() 89 switch (supply->idx) { in rk3568_iodomain_write() 93 b = supply->idx; in rk3568_iodomain_write() 95 b = supply->idx + 4; in rk3568_iodomain_write() [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3368-lion.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 15 stdout-path = "serial0:115200n8"; 18 ext_gmac: gmac-clk { 19 compatible = "fixed-clock"; 20 clock-frequency = <125000000>; 21 clock-output-names = "ext_gmac"; 22 #clock-cells = <0>; 26 compatible = "i2c-mux-gpio"; 27 #address-cells = <1>; [all …]
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/openbmc/linux/arch/riscv/boot/dts/canaan/ |
H A D | sipeed_maixduino.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> 7 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 16 compatible = "sipeed,maixduino", "canaan,kendryte-k210"; 20 stdout-path = "serial0:115200n8"; 23 gpio-keys { 24 compatible = "gpio-keys"; 26 key-boot { [all …]
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/openbmc/linux/drivers/media/i2c/ |
H A D | ov5640.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. 4 * Copyright (C) 2014-2017 Mentor Graphics Inc. 8 #include <linux/clk-provider.h> 22 #include <media/v4l2-async.h> 23 #include <media/v4l2-ctrls.h> 24 #include <media/v4l2-device.h> 25 #include <media/v4l2-event.h> 26 #include <media/v4l2-fwnode.h> 27 #include <media/v4l2-subdev.h> [all …]
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/openbmc/linux/ |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |