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/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dvlv_dsi_pll.c108 config->dsi_pll.ctrl = 1 << (DSI_PLL_P1_POST_DIV_SHIFT + calc_p - 2); in dsi_calc_mnp()
109 config->dsi_pll.div = in dsi_calc_mnp()
128 pll_ctl = config->dsi_pll.ctrl; in vlv_dsi_pclk()
129 pll_div = config->dsi_pll.div; in vlv_dsi_pclk()
192 config->dsi_pll.ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; in vlv_dsi_pll_compute()
195 config->dsi_pll.ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL; in vlv_dsi_pll_compute()
197 config->dsi_pll.ctrl |= DSI_PLL_VCO_EN; in vlv_dsi_pll_compute()
200 config->dsi_pll.div, config->dsi_pll.ctrl); in vlv_dsi_pll_compute()
223 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_DIVIDER, config->dsi_pll.div); in vlv_dsi_pll_enable()
225 config->dsi_pll.ctrl & ~DSI_PLL_VCO_EN); in vlv_dsi_pll_enable()
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/openbmc/linux/drivers/gpu/drm/omapdrm/dss/
H A Ddsi.h73 #define DSI_PLL 2 macro
77 #define DSI_PLL_CONTROL DSI_REG(DSI_PLL, 0x0000)
78 #define DSI_PLL_STATUS DSI_REG(DSI_PLL, 0x0004)
79 #define DSI_PLL_GO DSI_REG(DSI_PLL, 0x0008)
80 #define DSI_PLL_CONFIGURATION1 DSI_REG(DSI_PLL, 0x000C)
81 #define DSI_PLL_CONFIGURATION2 DSI_REG(DSI_PLL, 0x0010)
/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Ddsi-phy-20nm.yaml27 - const: dsi_pll
56 reg-names = "dsi_pll",
H A Ddsi-phy-14nm.yaml34 - const: dsi_pll
68 "dsi_pll";
H A Ddsi-phy-28nm.yaml32 - const: dsi_pll
61 reg-names = "dsi_pll",
H A Ddsi-phy-7nm.yaml36 - const: dsi_pll
66 "dsi_pll";
H A Ddsi-phy-10nm.yaml31 - const: dsi_pll
87 "dsi_pll";
H A Dqcom,sdm845-mdss.yaml199 "dsi_pll";
269 "dsi_pll";
H A Dqcom,msm8998-mdss.yaml190 "dsi_pll";
260 "dsi_pll";
H A Dqcom,sm8550-mdss.yaml261 "dsi_pll";
331 "dsi_pll";
H A Dqcom,sm8250-mdss.yaml252 "dsi_pll";
323 "dsi_pll";
H A Dqcom,sm8150-mdss.yaml250 "dsi_pll";
321 "dsi_pll";
H A Dqcom,sm8450-mdss.yaml271 "dsi_pll";
342 "dsi_pll";
H A Dqcom,qcm2290-mdss.yaml190 "dsi_pll";
H A Dqcom,sm6375-mdss.yaml198 "dsi_pll";
H A Dqcom,sm6125-mdss.yaml199 "dsi_pll";
H A Dqcom,sm6350-mdss.yaml197 "dsi_pll";
H A Dqcom,sm6115-mdss.yaml178 "dsi_pll";
H A Dqcom,sc7180-mdss.yaml226 "dsi_pll";
H A Dqcom,sc7280-mdss.yaml248 "dsi_pll";
/openbmc/linux/drivers/clk/ux500/
H A Du8500_of_clk.c278 clk_reg_prcmu_scalable("dsi_pll", "hdmiclk", in u8500_clk_init()
281 clk_reg_prcmu_scalable("dsi0clk", "dsi_pll", in u8500_clk_init()
284 clk_reg_prcmu_scalable("dsi1clk", "dsi_pll", in u8500_clk_init()
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsdm660.dtsi225 "dsi_pll";
H A Dmsm8953.dtsi926 "dsi_pll";
993 "dsi_pll";
/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Ddsi.c100 #define DSI_PLL 2 macro
104 #define DSI_PLL_CONTROL DSI_REG(DSI_PLL, 0x0000)
105 #define DSI_PLL_STATUS DSI_REG(DSI_PLL, 0x0004)
106 #define DSI_PLL_GO DSI_REG(DSI_PLL, 0x0008)
107 #define DSI_PLL_CONFIGURATION1 DSI_REG(DSI_PLL, 0x000C)
108 #define DSI_PLL_CONFIGURATION2 DSI_REG(DSI_PLL, 0x0010)
440 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg()
456 case DSI_PLL: base = dsi->pll_base; break; in dsi_read_reg()
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8064.dtsi1330 reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
1399 reg-names = "dsi_pll",

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