| /openbmc/linux/include/linux/ |
| H A D | math64.h | 16 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
24 * divide.
33 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
47 * div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder
61 * div64_u64 - unsigned 64bit divide with 64bit divisor
73 * div64_s64 - signed 64bit divide with 64bit divisor
116 * div_u64 - unsigned 64bit divide with 32bit divisor
120 * This is the most common 64bit divide and should be used if possible,
122 * divide.
135 * div_s64 - signed 64bit divide with 32bit divisor
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| H A D | reciprocal_div.h | 47 * ceil(log2(d)) result will be 32 which then requires u128 divide on host. The
54 * It makes no sense to use this advanced version for host divide emulation,
58 * However, it makes sense to use it for JIT divide code generation for which
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| /openbmc/u-boot/include/linux/ |
| H A D | math64.h | 14 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
17 * divide.
26 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
35 * div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder
44 * div64_u64 - unsigned 64bit divide with 64bit divisor
52 * div64_s64 - signed 64bit divide with 64bit divisor
91 * div_u64 - unsigned 64bit divide with 32bit divisor
93 * This is the most common 64bit divide and should be used if possible,
95 * divide.
106 * div_s64 - signed 64bit divide with 32bit divisor
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| /openbmc/qemu/hw/misc/ |
| H A D | npcm7xx_clk.c | 159 freq = s->divide(s); in npcm7xx_clk_update_divider()
266 uint32_t (*divide)(NPCM7xxClockDividerState *s); member
391 .divide = divide_by_constant,
398 .divide = divide_by_constant,
405 .divide = divide_by_constant,
413 .divide = shift_by_reg_divisor,
423 .divide = divide_by_reg_divisor,
433 .divide = divide_by_reg_divisor,
443 .divide = divide_by_reg_divisor,
453 .divide = divide_by_reg_divisor,
[all …]
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| /openbmc/linux/tools/perf/pmu-events/arch/x86/goldmontplus/ |
| H A D | floating-point.json | 3 "BriefDescription": "Cycles the FP divide unit is busy",
6 "PublicDescription": "Counts core cycles the floating point divide unit is busy.",
19 "BriefDescription": "Floating point divide uops retired (Precise Event Capable)",
23 "PublicDescription": "Counts the number of floating point divide uops retired.",
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| /openbmc/linux/tools/perf/pmu-events/arch/x86/goldmont/ |
| H A D | floating-point.json | 3 "BriefDescription": "Cycles the FP divide unit is busy",
6 "PublicDescription": "Counts core cycles the floating point divide unit is busy.",
19 "BriefDescription": "Floating point divide uops retired. (Precise Event Capable)",
23 "PublicDescription": "Counts the number of floating point divide uops retired.",
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| /openbmc/linux/arch/arm/mach-ep93xx/ |
| H A D | clock.c | 595 * These four bits set the divide ratio between the PLL2 in ep93xx_clock_init()
597 * 0000 - Divide by 1 in ep93xx_clock_init()
598 * 0001 - Divide by 2 in ep93xx_clock_init()
599 * 0010 - Divide by 3 in ep93xx_clock_init()
600 * 0011 - Divide by 4 in ep93xx_clock_init()
601 * 0100 - Divide by 5 in ep93xx_clock_init()
602 * 0101 - Divide by 6 in ep93xx_clock_init()
603 * 0110 - Divide by 7 in ep93xx_clock_init()
604 * 0111 - Divide by 8 in ep93xx_clock_init()
605 * 1000 - Divide by 9 in ep93xx_clock_init()
[all …]
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| /openbmc/linux/drivers/acpi/acpica/ |
| H A D | utmath.c | 14 /* Structures used only for 64-bit divide */
229 * Optional support for 64-bit double-precision integer divide. This code
233 * Support for a more normal 64-bit divide/modulo (with check for a divide-
247 * RETURN: Status (Checks for divide-by-zero)
250 * divide and modulo. The result is a 64-bit quotient and a
268 ACPI_ERROR((AE_INFO, "Divide by zero")); in acpi_ut_short_divide()
276 * and is generated by the second divide. in acpi_ut_short_divide()
305 * RETURN: Status (Checks for divide-by-zero)
307 * DESCRIPTION: Perform a divide and modulo.
330 ACPI_ERROR((AE_INFO, "Divide by zero")); in acpi_ut_divide()
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| /openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/ |
| H A D | clock.c | 278 uint32_t divide, rate, tgtclk; in mxs_set_ssp_busclock() local
287 for (divide = 2; divide < 254; divide += 2) { in mxs_set_ssp_busclock()
288 rate = sspclk / freq / divide; in mxs_set_ssp_busclock()
293 tgtclk = sspclk / divide / rate; in mxs_set_ssp_busclock()
296 tgtclk = sspclk / divide / rate; in mxs_set_ssp_busclock()
303 (divide << SSP_TIMING_CLOCK_DIVIDE_OFFSET) | in mxs_set_ssp_busclock()
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| /openbmc/linux/arch/m68k/ifpsp060/ |
| H A D | ilsp.doc | 34 module can be used to emulate 64-bit divide and multiply,
95 For a divide:
105 bsr.l _060LISP_TOP+0x08 # branch to divide routine
128 If the instruction being emulated is a divide and the source
130 instruction, executes an implemented divide using a zero
131 source operand so that an "Integer Divide-by-Zero" exception
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/ |
| H A D | scg.h | 84 /* SCG Slow IRC Divide Register */
106 /* SCG Fast IRC Divide Register */
126 /* SCG Fast IRC Divide Register */
273 u32 soscdiv; /* System OSC Divide Register */
279 u32 sircdiv; /* Slow IRC Divide Register */
311 u32 splldiv; /* System PLL Divide Register */
322 u32 uplldiv; /* USB PLL Divide Register */
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| /openbmc/sdbusplus/example/yaml/net/poettering/ |
| H A D | Calculator.interface.yaml | 24 - name: Divide
31 The first integer to divide.
35 The second integer to divide.
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| /openbmc/qemu/include/hw/misc/ |
| H A D | npcm7xx_clk.h | 78 NPCM7XX_CLOCK_GFXM_DIVIDER, /* divide by 3 */
133 * @divide: The function the divider uses to divide the input.
147 uint32_t (*divide)(struct NPCM7xxClockDividerState *s); member
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| /openbmc/openbmc/poky/meta/conf/machine/include/microblaze/ |
| H A D | feature-microblaze-math.inc | 6 TUNEVALID[divide-hard] = "Hardware divider"
19 TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'divide-hard', ' -mno-xl-soft-div', ' -mxl-so…
31 MBPKGARCH_MATH .= "${@bb.utils.contains('TUNE_FEATURES', 'divide-hard', '-div', '', d)}"
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| /openbmc/linux/arch/arm/mach-pxa/ |
| H A D | smemc.h | 57 #define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
63 #define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */
65 #define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */
68 #define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */
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| /openbmc/linux/drivers/gpu/drm/mcde/ |
| H A D | mcde_clk_div.c | 93 * means "divide by 2". in mcde_clk_div_recalc_rate()
102 /* 0 in the PCD means "divide by 2", 1 means "divide by 3" etc */ in mcde_clk_div_recalc_rate()
117 * We cache the CR bits to set the divide in the state so that in mcde_clk_div_set_rate()
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| /openbmc/linux/arch/x86/math-emu/ |
| H A D | div_Xsig.S | 16 | Divide the 96 bit quantity pointed to by a, by that pointed to by b, and |
99 | Divide: Return arg1/arg2 to arg3. |
114 /* Divide by 2 to prevent overflow */
136 /* We will divide by a number which is too large */
141 /* here we need to divide by 100000000h,
147 divl %ecx /* Divide the numerator by the augmented
222 divl %ecx /* Divide the numerator by the denom ms dw */
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| H A D | reg_u_div.S | 6 | Divide one FPU_REG by another and put the result in a destination FPU_REG.|
118 jnz L_Full_Division /* Can't do a quick divide */
132 /* Divide the 64 bit number by the 32 bit denominator */
163 | Divide: Return arg1/arg2 to arg3. |
218 /* We will divide by a number which is too large */
223 /* here we need to divide by 100000000h,
229 divl %ecx /* Divide the numerator by the augmented
304 divl %ecx /* Divide the numerator by the denom ms dw */
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| /openbmc/linux/drivers/usb/dwc3/ |
| H A D | dwc3-octeon.c | 64 /* Divide the reference clock by 2 before entering the
87 * 0x0 = divide by 1
88 * 0x1 = divide by 2
89 * 0x2 = divide by 4
90 * 0x3 = divide by 6
91 * 0x4 = divide by 8
92 * 0x5 = divide by 16
93 * 0x6 = divide by 24
94 * 0x7 = divide by 32
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| /openbmc/u-boot/drivers/serial/ |
| H A D | mcfuart.c | 52 /* write to CTUR: divide counter upper byte */ in mcf_serial_init_common()
54 /* write to CTLR: divide counter lower byte */ in mcf_serial_init_common()
70 /* write to CTUR: divide counter upper byte */ in mcf_serial_setbrg_common()
72 /* write to CTLR: divide counter lower byte */ in mcf_serial_setbrg_common()
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| /openbmc/linux/drivers/clk/pxa/ |
| H A D | clk-pxa.c | 22 #define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
28 #define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */
30 #define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */
33 #define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */
183 * must be set prior to the change. Clearing the divide must be done in pxa2xx_cpll_change()
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| /openbmc/linux/drivers/net/ethernet/intel/i40e/ |
| H A D | i40e_txrx.h | 220 * Thus, we need to divide by 12K. But division is slow! Instead,
224 * To divide by 12K, we first divide by 4K, then divide by 3:
225 * To divide by 4K, shift right by 12 bits
226 * To divide by 3, multiply by 85, then divide by 256
227 * (Divide by 256 is done by shifting right by 8 bits)
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| /openbmc/linux/drivers/net/ethernet/intel/iavf/ |
| H A D | iavf_txrx.h | 215 * Thus, we need to divide by 12K. But division is slow! Instead,
219 * To divide by 12K, we first divide by 4K, then divide by 3:
220 * To divide by 4K, shift right by 12 bits
221 * To divide by 3, multiply by 85, then divide by 256
222 * (Divide by 256 is done by shifting right by 8 bits)
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| /openbmc/linux/include/linux/can/platform/ |
| H A D | cc770.h | 10 #define CPUIF_DMC 0x20 /* Divide Memory Clock */
11 #define CPUIF_DSC 0x40 /* Divide System Clock */
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| /openbmc/linux/tools/perf/pmu-events/arch/x86/amdzen1/ |
| H A D | floating-point.json | 87 "BriefDescription": "Divide and square root Ops.",
88 …ave retired. The number of events logged per cycle can vary from 0 to 8. Divide and square root Op…
122 "BriefDescription": "Double precision divide/square root FLOPS.",
123 …e can vary from 0 to 64. This event can count above 15. Double precision divide/square root FLOPS.…
150 "BriefDescription": "Single-precision divide/square root FLOPS.",
151 …e can vary from 0 to 64. This event can count above 15. Single-precision divide/square root FLOPS.…
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