Searched +full:ddr +full:- +full:wb +full:- +full:channels (Results 1 – 14 of 14) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | qca,ath79-cpu-intc.txt | 3 On most SoC the IRQ controller need to flush the DDR FIFO before running 5 qca,ddr-wb-channels and qca,ddr-wb-channel-interrupts properties. 9 - compatible: has to be "qca,<soctype>-cpu-intc", "qca,ar7100-cpu-intc" 11 - interrupt-controller : Identifies the node as an interrupt controller 12 - #interrupt-cells : Specifies the number of cells needed to encode interrupt 20 - qca,ddr-wb-channel-interrupts: List of the interrupts needing a write 22 - qca,ddr-wb-channels: List of phandles to the write buffer channels for 23 each interrupt. If qca,ddr-wb-channel-interrupts is not present the interrupt 28 interrupt-controller { 29 compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc"; [all …]
|
/openbmc/linux/drivers/irqchip/ |
H A D | irq-ath79-cpu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> 7 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> 18 #include <asm/mach-ath79/ath79.h> 27 * This array map the interrupt lines to the DDR write buffer channels. 31 -1, -1, -1, -1, -1, -1, -1, -1, 48 irq = fls(pending) - 1; in plat_irq_dispatch() 49 if (irq < ARRAY_SIZE(irq_wb_chan) && irq_wb_chan[irq] != -1) in plat_irq_dispatch() 63 node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells"); in ar79_cpu_intc_of_init() 70 node, "qca,ddr-wb-channel-interrupts", i, &irq); in ar79_cpu_intc_of_init() [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | qca,ath79-ddr-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/qca,ath79-ddr-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Atheros AR7xxx/AR9xxx DDR controller 10 - Krzysztof Kozlowski <krzk@kernel.org> 13 The DDR controller of the AR7xxx and AR9xxx families provides an interface to 14 flush the FIFO between various devices and the DDR. This is mainly used by 21 - items: 22 - const: qca,ar9132-ddr-controller [all …]
|
/openbmc/linux/arch/mips/boot/dts/qca/ |
H A D | ar9132.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ath79-clk.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 22 cpuintc: interrupt-controller { 23 compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc"; 25 interrupt-controller; 26 #interrupt-cells = <1>; [all …]
|
H A D | ar9331.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ath79-clk.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 22 cpuintc: interrupt-controller { 23 compatible = "qca,ar7100-cpu-intc"; 25 interrupt-controller; 26 #interrupt-cells = <1>; [all …]
|
/openbmc/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
H A D | uncore-interconnect.json | 27 "BriefDescription": "FAF - request insert from TC.", 41 "BriefDescription": "FAF allocation -- sent to ADQ", 72 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 80 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 88 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 96 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", 104 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", 112 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary", 120 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary", 128 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch", [all …]
|
H A D | uncore-cache.json | 223 "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Not Needed", 227 …"PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory st… 232 "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Needed", 236 …"PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory s… 241 …"BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory writ… 245 …"PublicDescription": "Counts only multi-socket cacheline Directory state updates memory writes iss… 250 …"BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory writ… 254 …"PublicDescription": "Counts only multi-socket cacheline Directory state updates due to memory wri… 281 …s from a remote socket which hit in the HitME cache (used to cache the multi-socket Directory stat… 396 …icDescription": "Counts when a normal (Non-Isochronous) read is issued to any of the memory contro… [all …]
|
/openbmc/linux/tools/perf/pmu-events/arch/x86/icelakex/ |
H A D | uncore-interconnect.json | 96 "BriefDescription": "FAF allocation -- sent to ADQ", 127 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 135 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 143 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 151 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", 159 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", 167 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary", 175 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary", 183 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch", 191 "BriefDescription": "Misc Events - Set 1 : Lost Forward", [all …]
|
H A D | uncore-cache.json | 1001 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 1093 "BriefDescription": "Multi-socket cacheline directory state lookups : Snoop Not Needed", 1097 …"PublicDescription": "Multi-socket cacheline directory state lookups : Snoop Not Needed : Counts t… 1102 "BriefDescription": "Multi-socket cacheline directory state lookups : Snoop Needed", 1106 …"PublicDescription": "Multi-socket cacheline directory state lookups : Snoop Needed : Counts the n… 1111 …"BriefDescription": "Multi-socket cacheline directory state updates; memory write due to directory… 1115 …"PublicDescription": "Counts only multi-socket cacheline directory state updates memory writes iss… 1120 …"BriefDescription": "Multi-socket cacheline directory state updates; memory write due to directory… 1124 …"PublicDescription": "Counts only multi-socket cacheline directory state updates due to memory wri… 1147 "BriefDescription": "Distress signal asserted : DPT Stalled - IV", [all …]
|
/openbmc/linux/tools/perf/pmu-events/arch/x86/snowridgex/ |
H A D | uncore-cache.json | 23 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.… 963 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 1073 "BriefDescription": "Distress signal asserted : DPT Stalled - IV", 1077 …"PublicDescription": "Distress signal asserted : DPT Stalled - IV : Counts the number of cycles ei… 1082 "BriefDescription": "Distress signal asserted : DPT Stalled - No Credit", 1086 …"PublicDescription": "Distress signal asserted : DPT Stalled - No Credit : Counts the number of c… 1131 …s -- a clockwise ring and a counter-clockwise ring. On the left side of the ring, the UP directio… 1140 …s -- a clockwise ring and a counter-clockwise ring. On the left side of the ring, the UP directio… 1149 …s -- a clockwise ring and a counter-clockwise ring. On the left side of the ring, the UP directio… 1158 …s -- a clockwise ring and a counter-clockwise ring. On the left side of the ring, the UP directio… [all …]
|
/openbmc/linux/ |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |
/openbmc/ |
D | opengrok1.0.log | 1 2025-01-08 03:00:39.311-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-01-08 03:00:39.421-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |
D | opengrok2.0.log | 1 2025-01-07 03:00:34.968-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-01-07 03:00:35.081-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |