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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-driver-bd9571mwv-regulator1 What: /sys/bus/i2c/devices/.../bd9571mwv-regulator.*.auto/backup_mode
5 Description: Read/write the current state of DDR Backup Mode, which controls
6 if DDR power rails will be kept powered during system suspend.
8 Two types of power switches (or control signals) can be used:
10 A. With a momentary power switch (or pulse signal), DDR
11 Backup Mode is enabled by default when available, as the
13 B. With a toggle power switch (or level signal), the
16 1. Configure PMIC for backup mode, to change the role of
17 the accessory power switch from a power switch to a
18 wake-up switch,
[all …]
/openbmc/linux/drivers/regulator/
H A Dbd9571mwv-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 * ROHM BD9571MWV-M and BD9574MWF-M regulator driver
12 #include <linux/mfd/rohm-generic.h>
23 /* DDR Backup Power */
24 u8 bkup_mode_cnt_keepon; /* from "rohm,ddr-backup-power" */
28 /* Power switch type */
57 ret = regmap_read(rdev->regmap, BD9571MWV_AVS_SET_MONI, &val); in bd9571mwv_avs_get_moni_state()
73 return regmap_write_bits(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), in bd9571mwv_avs_set_voltage_sel_regmap()
74 rdev->desc->vsel_mask, sel); in bd9571mwv_avs_set_voltage_sel_regmap()
86 ret = regmap_read(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), &val); in bd9571mwv_avs_get_voltage_sel_regmap()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Drohm,bd9571mwv.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ROHM BD9571MWV/BD9574MWF Power Management Integrated Circuit (PMIC)
10 - Marek Vasut <marek.vasut@gmail.com>
15 - rohm,bd9571mwv
16 - rohm,bd9574mwf
24 interrupt-controller: true
26 '#interrupt-cells':
29 gpio-controller: true
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/openbmc/linux/arch/arm/mach-lpc32xx/
H A Dpm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-lpc32xx/pm.c
12 * LPC32XX CPU and system power management
14 * The LPC32XX has three CPU modes for controlling system power: run,
15 * direct-run, and halt modes. When switching between halt and run modes,
16 * the CPU transistions through direct-run mode. For Linux, direct-run
25 * Direct-run mode:
36 * wake the system up back into direct-run mode.
39 * DRAM clocking and refresh are slightly different for systems with DDR
41 * SDRAM will still be accessible in direct-run mode. In DDR based systems,
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/openbmc/linux/arch/sh/include/mach-sdk7786/mach/
H A Dfpga.h1 /* SPDX-License-Identifier: GPL-2.0 */
78 #define PWRCR_PDWNACK BIT(5) /* Power down acknowledge */
79 #define PWRCR_PDWNREQ BIT(7) /* Power down request */
80 #define PWRCR_INT2 BIT(11) /* INT2 connection to power manager */
81 #define PWRCR_BUPINIT BIT(13) /* DDR backup initialize */
82 #define PWRCR_BKPRST BIT(15) /* Backup power reset */
131 /* arch/sh/boards/mach-sdk7786/fpga.c */
135 /* arch/sh/boards/mach-sdk7786/nmi.c */
/openbmc/linux/arch/arm/mach-at91/
H A Dpm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/mach-at91/pm.c
4 * AT91 Power Management
35 * struct at91_pm_bu - AT91 power management backup unit data structure
36 * @suspended: true if suspended to backup mode
38 * @canary: canary data for memory checking after exit from backup mode
40 * @ddr_phy_calibration: DDR PHY calibration data: ZQ0CR0, first 8 words
52 * struct at91_pm_sfrbu_regs - registers mapping for SFRBU
53 * @pswbu: power switch BU control registers
65 * enum at91_pm_eth_clk - Ethernet clock indexes
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H A Dpm_suspend.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-at91/pm_slow_clock.S
13 #include "pm_data-offsets.h"
16 .arch armv7-a
91 * Set state for 2.5V low power regulator
92 * @ena: 0 - disable regulator
93 * 1 - enable regulator
125 * Enable self-refresh
164 /* Switch to self-refresh. */
170 /* Wait for self-refresh enter. */
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/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-ampere-mtjade.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-57 assigned to NVMe slot 0-7
24 * i2c bus 60-67 assigned to NVMe slot 8-15
36 * i2c bus 70-77 assigned to NVMe slot 16-23
48 * i2c bus 80-81 assigned to NVMe M2 slot 0-1
60 stdout-path = &uart5;
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H A Daspeed-bmc-ampere-mtmitchell.dts1 // SPDX-License-Identifier: GPL-2.0-only
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/gpio/aspeed-gpio.h>
12 compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";
27 * i2c bus 30-31 assigned to OCP slot 0-1
33 * i2c bus 32-33 assigned to Riser slot 0-1
39 * i2c bus 38-39 assigned to FRU on Riser slot 0-1
82 stdout-path = &uart5;
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H A Daspeed-bmc-ampere-mtjefferson.dts1 // SPDX-License-Identifier: GPL-2.0-only
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/gpio/aspeed-gpio.h>
12 compatible = "ampere,mtjefferson-bmc", "aspeed,ast2600";
41 stdout-path = &uart5;
49 reserved-memory {
50 #address-cells = <1>;
51 #size-cells = <1>;
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/openbmc/u-boot/common/spl/
H A DKconfig25 supports MMC, NAND and YMODEM and other methods loading of U-Boot
29 bool "Pass hand-off information from SPL to U-Boot proper"
32 It is useful to be able to pass information from SPL to U-Boot
33 proper to preserve state that is known in SPL and is needed in U-Boot.
34 Enable this to locate the handoff information in U-Boot proper, early
35 in boot. It is available in gd->handoff. The state state is set up
44 This option can minilize the SPL size to compatible with AST2600-A0
48 bool "Pass hand-off information from SPL to U-Boot proper"
53 used to pass information like the size of SDRAM from SPL to U-Boot
59 default "arch/$(ARCH)/cpu/u-boot-spl.lds"
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/openbmc/u-boot/arch/arm/dts/
H A Dulcb.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car Gen3 ULCB board
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
13 model = "Renesas R-Car Gen3 ULCB board";
21 stdout-path = "serial0:115200n8";
24 audio_clkout: audio-clkout {
27 * but needed to avoid cs2000/rcar_sound probe dead-lock
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
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H A Dsalvator-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for common parts of Salvator-X board variants
5 * Copyright (C) 2015-2016 Renesas Electronics Corp.
9 * SSI-AK4613
31 #include <dt-bindings/gpio/gpio.h>
42 stdout-path = "serial0:115200n8";
45 audio_clkout: audio-clkout {
48 * but needed to avoid cs2000/rcar_sound probe dead-lock
50 compatible = "fixed-clock";
51 #clock-cells = <0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dulcb.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car Gen3 ULCB board
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
13 model = "Renesas R-Car Gen3 ULCB board";
32 stdout-path = "serial0:115200n8";
35 audio_clkout: audio-clkout {
38 * but needed to avoid cs2000/rcar_sound probe dead-lock
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
[all …]
H A Debisu.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
33 stdout-path = "serial0:115200n8";
36 audio_clkout: audio-clkout {
39 * but needed to avoid cs2000/rcar_sound probe dead-lock
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <11289600>;
47 compatible = "pwm-backlight";
[all …]
H A Dsalvator-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for common parts of Salvator-X board variants
5 * Copyright (C) 2015-2016 Renesas Electronics Corp.
9 * SSI-AK4613
31 #include <dt-bindings/gpio/gpio.h>
32 #include <dt-bindings/input/input.h>
54 stdout-path = "serial0:115200n8";
57 audio_clkout: audio-clkout {
60 * but needed to avoid cs2000/rcar_sound probe dead-lock
62 compatible = "fixed-clock";
[all …]
/openbmc/linux/drivers/power/reset/
H A Dat91-reset.c6 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcosoft.com>
20 #include <linux/reset-controller.h>
21 #include <linux/power/power_on_reason.h>
26 #include <dt-bindings/reset/sama7g5-reset.h>
47 * enum reset_type - reset types
48 * @RESET_TYPE_GENERAL: first power-up reset
49 * @RESET_TYPE_WAKEUP: return from backup mode
69 * struct at91_reset - AT91 reset specific data structure
79 * @ramc_lpr: SDRAM Controller Low Power Register
97 * struct at91_reset_data - AT91 reset data
[all …]
/openbmc/u-boot/board/sbc8548/
H A DREADME6 memory. It also has 128MB SDRAM 100MHz LBC memory, with both a PCI-e,
7 and a PCI-X slot, dual mini-DB9 for UART, and dual RJ-45 for eTSEC
10 U-Boot Configuration:
13 The following possible U-Boot configuration targets are available:
26 a base clock of 66MHz. Note that you need both PCI enabled in U-Boot
34 then you should build a U-Boot with a _PCI_33_ config and store this
36 card. [The above discussion assumes that the SW2[1-4] has not been changed
41 and three, but with PCI-e support enabled as well.
43 PCI output listing with an intel e1000 PCI-x and a Syskonnect SK-9Exx
44 is shown below for sbc8548_PCI_66_PCIE_config. (Note that PCI-e with
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am654-base-board.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-am654.dtsi"
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "ti,am654-evm", "ti,am654";
31 stdout-path = "serial2:115200n8";
41 reserved-memory {
42 #address-cells = <2>;
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/bios/
H A Dbios_parser2.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
48 bp->base.ctx->logger
88 #define DATA_TABLES(table) (bp->master_data_tbl->listOfdatatables.table)
92 kfree(bp->base.bios_local_image); in bios_parser2_destruct()
93 kfree(bp->base.integrated_info); in bios_parser2_destruct()
119 tbl_revision->major = 0; in get_atom_data_table_revision()
120 tbl_revision->minor = 0; in get_atom_data_table_revision()
125 tbl_revision->major = in get_atom_data_table_revision()
126 (uint32_t) atom_data_tbl->format_revision & 0x3f; in get_atom_data_table_revision()
127 tbl_revision->minor = in get_atom_data_table_revision()
[all …]
/openbmc/u-boot/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0+
15 # o Do not use make's built-in rules and variables
16 # (this increases performance and avoids hard-to-debug behaviour);
18 MAKEFLAGS += -rR --include-dir=$(CURDIR)
32 # Most importantly: sub-Makefiles should only ever modify files in
35 # unavoidable when linking the built-in.o targets which finally
46 # ---------------------------------------------------------------------------
53 # cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
60 # A simple variant is to prefix commands with $(Q) - that's useful
61 # for commands that shall be hidden in non-verbose mode.
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/openbmc/linux/drivers/usb/host/
H A Docteon-hcd.c1 // SPDX-License-Identifier: GPL-2.0
11 * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
54 #include <linux/dma-mapping.h>
60 #include "octeon-hcd.h"
63 * enum cvmx_usb_speed - the possible USB device speeds
76 * enum cvmx_usb_transfer - the possible USB transfer types
95 * enum cvmx_usb_direction - the transfer directions
106 * enum cvmx_usb_status - possible callback function status codes
138 * struct cvmx_usb_port_status - the USB port status information
143 * @port_powered: 1 = Port power is being supplied to the device, 0 =
[all …]
/openbmc/linux/drivers/net/ethernet/sfc/siena/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
[all …]
/openbmc/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
[all …]
/openbmc/linux/
H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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