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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-sx93246 SX9324 has 3 inputs, CS0, CS1 and CS2. Hardware layout
19 while CS1 and CS2 are used as shields.
21 [PH1], CS1 is measured, CS0 and CS2 are shield:
23 [PH2], CS2 is measured, CS0 and CS1 are shield:
25 [PH3], CS1 and CS2 are measured (combo mode):
/openbmc/u-boot/drivers/ddr/fsl/
H A Doptions.c56 { /* cs2 */
112 { /* cs2 */
139 { /* cs2 */
155 { /* cs2 */
177 { /* cs2 */
206 { /* cs2 */
236 { /* cs2 */
259 { /* cs2 */
286 { /* cs2 */
342 { /* cs2 */
[all …]
H A Dutil.c307 puts("CS0+CS1+CS2+CS3"); in print_ddr_info()
313 puts("CS2+CS3"); in print_ddr_info()
316 puts("CS0+CS1 and CS2+CS3"); in print_ddr_info()
/openbmc/u-boot/drivers/watchdog/
H A Dulp_wdog.c15 u8 cs2; member
66 val = readb(&wdog->cs2); in hw_watchdog_init()
68 writeb(val, &wdog->cs2); in hw_watchdog_init()
73 writeb(WDG_LPO_CLK, &wdog->cs2);/* setting 1-kHz clock source */ in hw_watchdog_init()
89 writeb(WDG_LPO_CLK, &wdog->cs2);/* setting 1-kHz clock source */ in reset_cpu()
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-375-pinctrl.txt21 mpp5 5 gpio, dev(ad7), spi0(cs2), spi1(cs2)
51 mpp35 35 gpio, ge1(rxctl), spi1(cs1), spi0(cs2)
58 mpp42 42 gpio, spi1(cs2), led(c0)
61 mpp45 45 gpio, spi0(cs2), pcie0(rstout)
77 mpp61 61 gpio, i2c1(sda), uart1(rxd), spi1(cs2), led(p0)
H A Dmarvell,armada-370-pinctrl.txt34 spi0(cs2)
77 mpp53 53 gpio, dev(ad14), sd0(clk), tdm(pclk), spi0(cs2),
82 mpp56 56 gpio, dev(cs2), uart1(cts), uart0(cts), spi0(cs3),
96 mpp65 65 gpio, spi0(mosi), spi0(cs2)
H A Dmarvell,armada-38x-pinctrl.txt31 mpp13 13 gpio, ge0(rxd1), pcie0(clkreq), pcie1(clkreq) [1], spi0(cs2), dev(ad15), pci…
44 mpp26 26 gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)
45 mpp27 27 gpio, spi0(cs3), ge1(txclkout), i2c1(sda), sd0(d7), dev(cs2)
61 mpp43 43 gpio, pcie0(clkreq), dram(vttctrl), dram(deccerr), spi1(cs2), dev(clkout), n…
H A Dmarvell,armada-39x-pinctrl.txt45 mpp26 26 gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)
46 mpp27 27 gpio, spi0(cs3), i2c1(sda), sd0(d7), dev(cs2), ge(txclkout)
62 mpp43 43 gpio, pcie0(clkreq), dram(vttctrl), dram(deccerr), spi1(cs2), dev(clkout), nand(rb1)
H A Dmarvell,armada-xp-pinctrl.txt63 mpp41 41 gpio, spi0(cs2), uart2(rts), lcd(vga-vsync), sata1(prsnt),
64 pcie(clkreq1), spi1(cs2)
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dsnps,dw-pcie-ep.yaml46 CDM/ELBI = 0 and CS2 = 0 or is a contiguous memory region
53 by setting CDM/ELBI = 0 and CS2 = 1. This is an intermix of
63 can be selected by setting CDM/ELBI = 1 and CS2 = 0 wires or can
71 and CS2 = 1. For IP-core releases prior v4.80a, these registers
H A Dsnps,dw-pcie.yaml55 CDM/ELBI = 0 and CS2 = 0 or is a contiguous memory region
62 by setting CDM/ELBI = 0 and CS2 = 1. This is an intermix of
72 can be selected by setting CDM/ELBI = 1 and CS2 = 0 wires or can
80 and CS2 = 1. For IP-core releases prior v4.80a, these registers
/openbmc/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-375.c58 MPP_FUNCTION(0x2, "spi0", "cs2"),
59 MPP_FUNCTION(0x3, "spi1", "cs2"),
157 MPP_FUNCTION(0x6, "dev", "cs2")),
218 MPP_FUNCTION(0x4, "spi0", "cs2"),
247 MPP_FUNCTION(0x3, "spi1", "cs2"),
260 MPP_FUNCTION(0x2, "spi0", "cs2"),
263 MPP_FUNCTION(0x6, "spi1", "cs2")),
352 MPP_FUNCTION(0x3, "spi1", "cs2"),
H A Dpinctrl-armada-370.c101 MPP_FUNCTION(0x5, "spi0", "cs2")),
287 MPP_FUNCTION(0x4, "spi0", "cs2"),
302 MPP_FUNCTION(0x1, "dev", "cs2"),
359 MPP_FUNCTION(0x2, "spi0", "cs2")),
/openbmc/linux/arch/mips/boot/dts/img/
H A Dpistachio.dtsi427 spim0_cs2_pin: spim0-cs2-pin {
428 spim0-cs2 {
434 spim0_cs2_alt_pin: spim0-cs2-alt-pin {
435 spim0-cs2 {
509 spim1_cs2_pin: spim1-cs2-pin {
510 spim1-cs2 {
517 spim1_cs2_alt0_pin: spim1-cs2-alt0-pin {
518 spim1-cs2 {
525 spim1_cs2_alt1_pin: spim1-cs2-alt1-pin {
526 spim1-cs2 {
/openbmc/linux/Documentation/devicetree/bindings/iio/proximity/
H A Dsemtech,sx9310.yaml57 1 2 - CS1 + CS2 (default)
58 0 1 2 3 - CS0 + CS1 + CS2 + CS3
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp_config.h81 * (0xF=CS0+CS1+CS2+CS3, 0xC=CS2+CS3...)
H A Dddr3_axp_mc_static.h50 {0x0001514, 0x00000000}, /* CS2 Size */
108 {0x0001514, 0x00000000}, /* CS2 Size */
160 {0x0001514, 0x00000000}, /* CS2 Size */
217 {0x0001514, 0x00000000}, /* CS2 Size */
266 {0x0001514, 0x00000000}, /* CS2 Size */
/openbmc/linux/drivers/bus/
H A Dimx-weim.c94 05, /* CS0(128M) CS1(0M) CS2(0M) CS3(0M) */ in imx_weim_gpr_setup()
95 033, /* CS0(64M) CS1(64M) CS2(0M) CS3(0M) */ in imx_weim_gpr_setup()
96 0113, /* CS0(64M) CS1(32M) CS2(32M) CS3(0M) */ in imx_weim_gpr_setup()
97 01111, /* CS0(32M) CS1(32M) CS2(32M) CS3(32M) */ in imx_weim_gpr_setup()
/openbmc/u-boot/arch/arm/mach-imx/
H A Dcpu.c315 reg &= ~0x7; /* CS0=128MB, CS1=0, CS2=0, CS3=0 */ in set_chipselect_size()
319 reg &= ~0x3F; /* CS0=64MB, CS1=64MB, CS2=0, CS3=0 */ in set_chipselect_size()
323 reg &= ~0x1FF; /* CS0=64MB, CS1=32MB, CS2=32MB, CS3=0 */ in set_chipselect_size()
327 reg &= ~0xFFF; /* CS0=32MB, CS1=32MB, CS2=32MB, CS3=32MB */ in set_chipselect_size()
/openbmc/linux/arch/m68k/include/asm/
H A Dm525xsim.h284 * Setup CS2 for IDE interface.
286 movel #0x50000000,%d0 /* CS2 mapped at 0x50000000 */
288 movel #0x001f0001,%d0 /* CS2 size of 1MB */
290 movew #0x0080,%d0 /* CS2 = 16bit, TA */
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-370-xp.dtsi80 devbus_cs2: devbus-cs2 {
272 <MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */
290 <MBUS_ID(0x01, 0x9a) 0 0xffffffff>, /* CS2 */
/openbmc/u-boot/board/armltd/integrator/
H A Darm-ebi.h17 #define EBI_CSR2_REG 0x08 /* CS2 = SSRAM */
/openbmc/linux/Documentation/devicetree/bindings/bus/
H A Dqcom,ebi2.txt18 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
26 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
/openbmc/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-freecom-fsg-3.dts101 /* Small syscon with some LEDs at CS2 */
103 compatible = "freecom,fsg-cs2-system-controller", "syscon";
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3430-sdp.dts52 <2 0 0x20000000 0x1000000>; /* CS2: 16MB for OneNAND */
155 reg = <2 0 0x20000>; /* CS2, offset 0, IO size 4 */

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