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/openbmc/u-boot/drivers/cpu/
H A Dmpc83xx_cpu.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 * enum e300_type - Identifiers for e300 cores
26 /* Array mapping the e300 core types to their human-readable names */
36 * enum mpc83xx_cpu_family - Identifiers for MPC83xx CPU families
37 * @FAMILY_830X: Identifier for the MPC830x CPU family
38 * @FAMILY_831X: Identifier for the MPC831x CPU family
39 * @FAMILY_832X: Identifier for the MPC832x CPU family
40 * @FAMILY_834X: Identifier for the MPC834x CPU family
41 * @FAMILY_836X: Identifier for the MPC836x CPU family
42 * @FAMILY_837X: Identifier for the MPC837x CPU family
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H A Dmpc83xx_cpu.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <cpu.h>
16 * struct mpc83xx_cpu_priv - Private data for MPC83xx CPUs
17 * @e300_type: The e300 core type of the MPC83xx CPU
18 * @family: The MPC83xx family the CPU belongs to
19 * @type: The MPC83xx type of the CPU
20 * @is_e_processor: Flag indicating whether the CPU is a E processor or not
21 * @is_a_variant: Flag indicating whtther the CPU is a A variant or not
22 * @revid: The revision ID of the CPU
23 * @revid.major: The major part of the CPU's revision ID
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/openbmc/linux/kernel/events/
H A Dhw_breakpoint.c1 // SPDX-License-Identifier: GPL-2.0+
15 * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
16 * using the CPU's debug registers.
17 * This file contains the arch-independent routines.
24 #include <linux/cpu.h>
32 #include <linux/percpu-rwsem.h>
51 * Per-CPU constraints data.
54 /* Number of pinned CPU breakpoints in a CPU. */
56 /* Histogram of pinned task breakpoints in a CPU. */
62 static struct bp_cpuinfo *get_bp_info(int cpu, enum bp_type_idx type) in get_bp_info() argument
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/openbmc/qemu/docs/system/arm/
H A Dcpu-features.rst1 Arm CPU Features
4 CPU features are optional features that a CPU of supporting type may
5 choose to implement or not. In QEMU, optional CPU features have
6 corresponding boolean CPU proprieties that, when enabled, indicate
8 indicate that it is not implemented. An example of an Arm CPU feature
9 is the Performance Monitoring Unit (PMU). CPU types such as the
10 Cortex-A15 and the Cortex-A57, which respectively implement Arm
11 architecture reference manuals ARMv7-A and ARMv8-A, may both optionally
12 implement PMUs. For example, if a user wants to use a Cortex-A15 without
13 a PMU, then the ``-cpu`` parameter should contain ``pmu=off`` on the QEMU
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/openbmc/qemu/target/arm/tcg/
H A Dcpu32.c2 * QEMU ARM TCG-only CPUs.
8 * SPDX-License-Identifier: GPL-2.0-or-later
12 #include "cpu.h"
13 #include "hw/core/tcg-cpu-ops.h"
22 /* Share AArch32 -cpu max features with AArch64. */
23 void aa32_max_features(ARMCPU *cpu) in aa32_max_features() argument
28 t = cpu->isar.id_isar5; in aa32_max_features()
35 cpu->isar.id_isar5 = t; in aa32_max_features()
37 t = cpu->isar.id_isar6; in aa32_max_features()
45 cpu->isar.id_isar6 = t; in aa32_max_features()
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H A Dcpu64.c18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "cpu.h"
26 #include "hw/qdev-properties.h"
29 #include "cpu-features.h"
34 ARMCPU *cpu = ARM_CPU(obj); in aarch64_a35_initfn() local
36 cpu->dtb_compatible = "arm,cortex-a35"; in aarch64_a35_initfn()
37 set_feature(&cpu->env, ARM_FEATURE_V8); in aarch64_a35_initfn()
38 set_feature(&cpu->env, ARM_FEATURE_NEON); in aarch64_a35_initfn()
39 set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); in aarch64_a35_initfn()
40 set_feature(&cpu->env, ARM_FEATURE_BACKCOMPAT_CNTFRQ); in aarch64_a35_initfn()
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/openbmc/qemu/tests/functional/
H A Dtest_ppc_74xx.py8 # later. See the COPYING file in the top-level directory.
21 self.vm.add_args('-cpu', '7400')
24 wait_for_console_pattern(self, '>> CPU type PowerPC,G4')
30 self.vm.add_args('-cpu', '7410')
33 wait_for_console_pattern(self, '>> CPU type PowerPC,74xx')
39 self.vm.add_args('-cpu', '7441')
42 wait_for_console_pattern(self, '>> CPU type PowerPC,G4')
48 self.vm.add_args('-cpu', '7445')
51 wait_for_console_pattern(self, '>> CPU type PowerPC,G4')
57 self.vm.add_args('-cpu', '7447')
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/openbmc/qemu/qapi/
H A Dmachine-target.json1 # -*- Mode: Python -*-
5 # See the COPYING file in the top-level directory.
7 { 'include': 'machine-common.json' }
12 # Virtual CPU model.
14 # A CPU model consists of the name of a CPU definition, to which delta
20 # @name: the name of the CPU definition the model is based on
33 # An enumeration of CPU model expansion types.
35 # @static: Expand to a static CPU model, a combination of a static
37 # model will never change, the expanded CPU model will be the
38 # same, independent of QEMU version, machine type, machine
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/openbmc/linux/drivers/acpi/
H A Dpptt.c1 // SPDX-License-Identifier: GPL-2.0
3 * pptt.c - parsing of Processor Properties Topology Table (PPTT)
33 if (pptt_ref + sizeof(struct acpi_subtable_header) > table_hdr->length) in fetch_pptt_subtable()
38 if (entry->length == 0) in fetch_pptt_subtable()
41 if (pptt_ref + entry->length > table_hdr->length) in fetch_pptt_subtable()
65 if (resource >= node->number_of_priv_resources) in acpi_get_pptt_resource()
74 static inline bool acpi_pptt_match_type(int table_type, int type) in acpi_pptt_match_type() argument
76 return ((table_type & ACPI_PPTT_MASK_CACHE_TYPE) == type || in acpi_pptt_match_type()
77 table_type & ACPI_PPTT_CACHE_TYPE_UNIFIED & type); in acpi_pptt_match_type()
81 * acpi_pptt_walk_cache() - Attempt to find the requested acpi_pptt_cache
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/openbmc/linux/drivers/base/
H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0
3 * cacheinfo support - processor cache information via sysfs
5 * Based on arch/x86/kernel/cpu/intel_cacheinfo.c
14 #include <linux/cpu.h>
23 /* pointer to per cpu cacheinfo */
25 #define ci_cacheinfo(cpu) (&per_cpu(ci_cpu_cacheinfo, cpu)) argument
26 #define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves) argument
27 #define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list) argument
28 #define per_cpu_cacheinfo_idx(cpu, idx) \ argument
29 (per_cpu_cacheinfo(cpu) + (idx))
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/openbmc/qemu/tests/qtest/
H A Dnuma-test.c9 * See the COPYING file in the top-level directory.
19 return g_strdup_printf("%s %s", generic_cli->str, test_cli); in make_cli()
28 cli = make_cli(data, "-machine smp.cpus=8 -numa node,nodeid=0,memdev=ram,cpus=0-3 " in test_mon_explicit()
29 "-numa node,nodeid=1,cpus=4-7"); in test_mon_explicit()
45 cli = make_cli(data, "-machine smp.cpus=8,smp.sockets=8 " in test_def_cpu_split()
46 "-numa node,memdev=ram -numa node"); in test_def_cpu_split()
62 cli = make_cli(data, "-machine smp.cpus=8 " in test_mon_partial()
63 "-numa node,nodeid=0,memdev=ram,cpus=0-1 " in test_mon_partial()
64 "-numa node,nodeid=1,cpus=4-5 "); in test_mon_partial()
76 *resp = qtest_qmp(qts, "{ 'execute': 'query-cpus-fast' }"); in get_cpus()
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/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
36 debounce-interval = <0>;
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H A Dexynos5422-odroidhc1.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include "exynos5422-odroid-core.dtsi"
16 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
19 led-controller {
20 compatible = "pwm-leds";
22 led-1 {
26 pwm-names = "pwm2";
27 max-brightness = <255>;
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/openbmc/qemu/accel/tcg/
H A Dtcg-accel-ops.c6 * Copyright (c) 2003-2008 Fabrice Bellard
31 #include "sysemu/cpu-timers.h"
32 #include "qemu/main-loop.h"
33 #include "qemu/guest-random.h"
35 #include "exec/exec-all.h"
37 #include "exec/tb-flush.h"
40 #include "hw/core/cpu.h"
42 #include "tcg-accel-ops.h"
43 #include "tcg-accel-ops-mttcg.h"
44 #include "tcg-accel-ops-rr.h"
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/openbmc/linux/drivers/bus/
H A Dmips_cdmm.c4 * Copyright (C) 2014-2015 Imagination Technologies Ltd.
13 #include <linux/cpu.h>
53 for (; table->type; ++table) { in mips_cdmm_lookup()
54 ret = (dev->type == table->type); in mips_cdmm_lookup()
67 return mips_cdmm_lookup(cdrv->id_table, cdev) != NULL; in mips_cdmm_match()
75 retval = add_uevent_var(env, "CDMM_CPU=%u", cdev->cpu); in mips_cdmm_uevent()
79 retval = add_uevent_var(env, "CDMM_TYPE=0x%02x", cdev->type); in mips_cdmm_uevent()
83 retval = add_uevent_var(env, "CDMM_REV=%u", cdev->rev); in mips_cdmm_uevent()
87 retval = add_uevent_var(env, "MODALIAS=mipscdmm:t%02X", cdev->type); in mips_cdmm_uevent()
102 CDMM_ATTR(cpu, "%u\n", dev->cpu);
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/openbmc/linux/kernel/sched/
H A Disolation.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * any CPU: unbound workqueues, timers, kthreads and any offloadable work.
7 * Copyright (C) 2017-2018 SUSE, Frederic Weisbecker
33 bool housekeeping_enabled(enum hk_type type) in housekeeping_enabled() argument
35 return !!(housekeeping.flags & BIT(type)); in housekeeping_enabled()
39 int housekeeping_any_cpu(enum hk_type type) in housekeeping_any_cpu() argument
41 int cpu; in housekeeping_any_cpu() local
44 if (housekeeping.flags & BIT(type)) { in housekeeping_any_cpu()
45 cpu = sched_numa_find_closest(housekeeping.cpumasks[type], smp_processor_id()); in housekeeping_any_cpu()
46 if (cpu < nr_cpu_ids) in housekeeping_any_cpu()
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/openbmc/u-boot/arch/powerpc/cpu/mpc8xxx/
H A Dcpu.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2009-2012 Freescale Semiconductor, Inc.
5 * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
6 * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
7 * cpu specific common code for 85xx/86xx processors.
105 u32 type = in_be32(&gur->tp_ityp[idx]); in init_type() local
107 if (type & TP_ITYP_AV) in init_type()
108 return type; in init_type()
117 u32 cluster, type, mask = 0; in compute_ppc_cpumask() local
121 cluster = in_be32(&gur->tp_cluster[i].lower); in compute_ppc_cpumask()
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/openbmc/openbmc/meta-ibm/recipes-phosphor/power/power-sequencer/swift/
H A Ducd90160.yaml1 - Device:
3 # Linux sysfs path for this power sequencer (0xC8 8-bit address)
4 path: /sys/bus/i2c/devices/i2c-8/8-0064
6 - "12.0V"
7 - "3.3V"
8 - "1.8V"
9 - "1.1V"
10 - "0.8V_SW"
11 - "5.0V"
12 - "VDN0"
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/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7-trip-points.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 cpu-alert-0 {
13 type = "passive";
15 cpu-alert-1 {
18 type = "passive";
20 cpu-alert-2 {
23 type = "passive";
25 cpu-alert-3 {
28 type = "passive";
30 cpu-alert-4 {
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/openbmc/linux/include/linux/
H A Dpercpu-defs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/percpu-defs.h - basic definitions for percpu areas
40 * Base implementations of per-CPU variable declarations and definitions, where
86 #define DECLARE_PER_CPU_SECTION(type, name, sec) \ argument
88 extern __PCPU_ATTRS(sec) __typeof__(type) name
90 #define DEFINE_PER_CPU_SECTION(type, name, sec) \ argument
94 extern __PCPU_ATTRS(sec) __typeof__(type) name; \
95 __PCPU_ATTRS(sec) __weak __typeof__(type) name
100 #define DECLARE_PER_CPU_SECTION(type, name, sec) \ argument
101 extern __PCPU_ATTRS(sec) __typeof__(type) name
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/openbmc/linux/arch/ia64/kernel/
H A Dtopology.c9 * Populate cpu entries in sysfs for non-numa systems as well
10 * Intel Corporation - Ashok Raj
12 * Populate cpu cache entries in sysfs for cpu cache info
15 #include <linux/cpu.h>
27 #include <asm/cpu.h>
34 if (cpu_data(num)->socket_id == -1) in arch_fix_phys_package_id()
35 cpu_data(num)->socket_id = slot; in arch_fix_phys_package_id()
45 * If CPEI can be re-targeted or if this is not in arch_register_cpu()
49 sysfs_cpus[num].cpu.hotpluggable = 1; in arch_register_cpu()
51 return register_cpu(&sysfs_cpus[num].cpu, num); in arch_register_cpu()
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/openbmc/linux/Documentation/devicetree/bindings/csky/
H A Dcpus.txt2 C-SKY CPU Bindings
6 the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
7 defining properties for every cpu.
13 cpus and cpu node bindings definition
16 - cpus node
18 Description: Container of cpu nodes
24 - #address-cells
26 Value type: <u32>
28 - #size-cells
30 Value type: <u32>
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/openbmc/linux/kernel/bpf/
H A Dbpf_lru_list.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #define LOCAL_LIST_IDX(t) ((t) - BPF_LOCAL_LIST_T_OFFSET)
22 static int get_next_cpu(int cpu) in get_next_cpu() argument
24 cpu = cpumask_next(cpu, cpu_possible_mask); in get_next_cpu()
25 if (cpu >= nr_cpu_ids) in get_next_cpu()
26 cpu = cpumask_first(cpu_possible_mask); in get_next_cpu()
27 return cpu; in get_next_cpu()
33 return &loc_l->lists[LOCAL_FREE_LIST_IDX]; in local_free_list()
38 return &loc_l->lists[LOCAL_PENDING_LIST_IDX]; in local_pending_list()
44 return READ_ONCE(node->ref); in bpf_lru_node_is_ref()
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/openbmc/qemu/target/s390x/
H A Dcpu_models.h2 * CPU models for s390x
9 * your option) any later version. See the COPYING file in the top-level
17 #include "target/s390x/gen-features.h"
18 #include "hw/core/cpu.h"
20 /* static CPU definition */
25 uint16_t type; /* cpu type identification */ member
27 uint8_t mha_pow; /* maximum host address power, mha = 2^pow-1 */
28 uint32_t hmfai; /* hypervisor-managed facilities */
43 /* CPU model based on a CPU definition */
49 uint32_t cpu_id; /* CPU id */
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/openbmc/linux/Documentation/devicetree/bindings/powerpc/
H A Dibm,powerpc-cpu-features.txt3 (skiboot/doc/device-tree/ibm,powerpc-cpu-features/binding.txt)
9 ibm,powerpc-cpu-features binding
12 This device tree binding describes CPU features available to software, with
19 /cpus/ibm,powerpc-cpu-features node binding
20 -------------------------------------------
22 Node: ibm,powerpc-cpu-features
24 Description: Container of CPU feature nodes.
26 The node name must be "ibm,powerpc-cpu-features".
35 - compatible
37 Value type: string
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