| /openbmc/u-boot/arch/arm/mach-tegra/ |
| H A D | ivc.c | 26 * established state, indicating that has cleared the counters in our
33 * allowed to clear the counters it owns asynchronously with respect to
43 * return to the established state once it has cleared its counters.
151 * Invalid cases where the counters indicate that the queue is over in tegra_ivc_channel_full()
187 * transmit counters until we've acknowledged its synchronization in tegra_ivc_check_read()
340 * SYNC ACK reset counters; move to EST; notify
341 * SYNC SYNC reset counters; move to ACK; notify
344 * ACK SYNC reset counters; move to ACK; notify
347 * EST SYNC reset counters; move to ACK; notify
369 * Reset tx_channel counters. The remote end is in the SYNC in tegra_ivc_channel_notified()
[all …]
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| /openbmc/openbmc/meta-openembedded/meta-oe/dynamic-layers/meta-python/recipes-dbs/mongodb/mongodb/ |
| H A D | 0001-server-Adjust-the-cache-alignment-assumptions.patch | 11 src/mongo/db/stats/counters.h:185:47: error: static assertion failed: cache line spill
22 src/mongo/db/stats/counters.h | 6 +++---
25 --- a/src/mongo/db/stats/counters.h
26 +++ b/src/mongo/db/stats/counters.h
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| /openbmc/u-boot/arch/riscv/cpu/ |
| H A D | cpu.c | 79 * Enable perf counters for cycle, time, in arch_cpu_init_dm()
80 * and instret counters only in arch_cpu_init_dm()
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| /openbmc/u-boot/include/ |
| H A D | fsl_fman.h | 97 u32 fmbm_rstc; /* Rx statistics counters */
98 u32 fmbm_rfrc; /* Rx frame counters */
107 u32 fmbm_rpc; /* Rx performance counters */
133 #define FMBM_RSTC_EN 0x80000000 /* statistics counters enable */
150 u32 fmbm_tstc; /* Tx statistics counters */
157 u32 fmbm_tpc; /* Tx performance counters */
180 /* FMBM_TSTC - Tx statistics counters */
217 #define FMQM_GC_STEN 0x10000000 /* enable global stat counters */
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| H A D | cpsw.h | 44 u32 hw_stats_reg_ofs; /* cpsw hw stats counters */
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| H A D | fsl_dtsec.h | 53 /* receive counters */
71 /* transmit counters */
165 #define ECNTRL_STEN 0x00001000 /* enable internal counters to update */
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| H A D | tsec.h | 215 /* Transmit and Receive Counters */
223 /* Receive Counters */
241 /* Transmit Counters */
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| /openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Metric/ |
| H A D | Reset.interface.yaml | 2 This interface allows to reset persistent metric counters.
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| /openbmc/openbmc/meta-openembedded/meta-networking/recipes-support/linux-atm/linux-atm/ |
| H A D | 0001-fix-compile-error-with-linux-kernel-v4.8.patch | 41 + int ref_count; /* free buffer pool usage counters */
43 + int rqa_count,rqu_count; /* queue condition counters */
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| /openbmc/openbmc/poky/meta/recipes-gnome/libdazzle/ |
| H A D | libdazzle_3.44.0.bb | 4 counters are included."
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| /openbmc/qemu/target/riscv/ |
| H A D | pmu.c | 31 * To keep it simple, any event can be mapped to any programmable counters in
33 * using programmable counters. In that case, mcycle & minstret must continue
35 * supported yet. Thus, number of counters are same across all harts.
181 * Information needed to update counters:
552 * QEMU supports only int64_t timers while RISC-V counters are uint64_t. in riscv_pmu_setup_timer()
591 error_setg(errp, "Number of counters exceeds maximum available"); in riscv_pmu_init()
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| /openbmc/u-boot/drivers/net/ |
| H A D | dnet.h | 42 /* ALL DNET RX STATISTICS COUNTERS */
60 /* DNET TX STATISTICS COUNTERS */
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| /openbmc/qemu/hw/riscv/ |
| H A D | riscv-iommu.h | 91 /* HPM event counters */
92 GHashTable *hpm_event_ctr_map; /* Mapping of events to counters */
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| /openbmc/qemu/tests/qtest/ |
| H A D | pnv-xive2-nvpg_bar.c | 89 * so that the backlog counters are initialized to something else in test_nvpg_bar()
106 /* check the initial counters */ in test_nvpg_bar()
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| /openbmc/qemu/hw/ssi/ |
| H A D | pnv_spi.c | 232 * Calculate the N1 counters based on passed in opcode and
236 * The counters returned are:
328 * Use a combination of N1 counters to build the N1 portion of the in operation_shiftn1()
333 * all we really care about are counters that tell use exactly how in operation_shiftn1()
341 * Zero out the N2 counters here in case there is no N2 operation following in operation_shiftn1()
457 /* The N1 frame shift is complete so reset the N1 counters */ in operation_shiftn1()
467 * Calculate the N2 counters based on passed in opcode and
471 * The counters returned are:
559 * Use a combination of N2 counters to build the N2 portion of the in operation_shiftn2()
628 * The N2 frame shift is complete so reset the N2 counters. in operation_shiftn2()
[all …]
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| /openbmc/qemu/docs/specs/ |
| H A D | riscv-iommu.rst | 85 - "hpm-counters": number of hardware performance counters available. Maximum value is 31.
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/tiptop/ |
| H A D | tiptop_2.3.1.bb | 1 SUMMARY = "Hardware performance monitoring counters"
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| /openbmc/qemu/include/hw/arm/ |
| H A D | msf2-soc.h | 44 * decrementing counters that generate individual interrupts to
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| /openbmc/qemu/hw/net/ |
| H A D | rtl8139.c | 34 * Implemented Tally Counters, increased VM load/save version
413 /* Tally counters */
429 /* Clears all tally counters */
430 static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters);
498 /* Tally counters */
516 /* Writes tally counters to memory via DMA */
1277 /* reset tally counters */ in rtl8139_reset()
1281 static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters) in RTL8139TallyCounters_clear() argument
1283 counters->TxOk = 0; in RTL8139TallyCounters_clear()
1284 counters->RxOk = 0; in RTL8139TallyCounters_clear()
[all …]
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| H A D | eepro100.c | 121 #define CU_STATSADDR 0x0040 /* Load dump counters address. */
122 #define CU_SHOWSTATS 0x0050 /* Dump statistical counters. */
124 #define CU_DUMPSTATS 0x0070 /* Dump and reset statistical counters. */
268 /* Statistical counters. Also used for wake-up packet (i82559). */
526 /* Standard statistical counters. */ in e100_pci_reset()
530 /* TODO: check TCO Statistical Counters bit. Documentation not clear. */ in e100_pci_reset()
532 /* TCO statistical counters. */ in e100_pci_reset()
536 /* No extended statistical counters, i82557 compatible. */ in e100_pci_reset()
545 /* No extended statistical counters. */ in e100_pci_reset()
724 missing("CU dump statistical counters"); in dump_statistics()
[all …]
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| /openbmc/u-boot/include/linux/ |
| H A D | netdevice.h | 26 * with byte counters.
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-dbs/rocksdb/files/ |
| H A D | 0006-Implement-timer-for-arm-v6.patch | 27 + if (pmuseren & 1) { // Allows reading perfmon counters for user mode code.
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| /openbmc/openbmc/meta-openembedded/meta-webserver/recipes-webadmin/netdata/netdata/ |
| H A D | netdata.conf | 236 # gaps on counters (deleteCounters) = no
618 # bandwidth counters = yes
619 # packets counters = yes
620 # errors counters = yes
621 # hardware packets counters = auto
622 # hardware errors counters = auto
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| /openbmc/libmctp/docs/ |
| H A D | fuzzing.md | 21 counters:
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| /openbmc/qemu/replay/ |
| H A D | replay-snapshot.c | 40 Therefore reset all the counters. */ in replay_post_load()
|