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/openbmc/openbmc/poky/meta/conf/machine/include/arm/armv8a/
H A Dtune-cortexa57-cortexa53.inc1 DEFAULTTUNE ?= "cortexa57-cortexa53"
3 TUNEVALID[cortexa57-cortexa53] = "Enable big.LITTLE Cortex-A57.Cortex-A53 specific processor optimi…
4 …ARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa57-cortexa53", " -mcpu=cortex-a57.cortex-a5…
5 MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa57-cortexa53", "cortexa57-cortex…
7 require conf/machine/include/arm/arch-armv8a.inc
10 AVAILTUNES += "cortexa57-cortexa53"
11 ARMPKGARCH:tune-cortexa57-cortexa53 = "cortexa57-cortexa53"
12 # We do not want -march since -mcpu is added above to cover for it
13 TUNE_FEATURES:tune-cortexa57-cortexa53 = "aarch64 crc cortexa57-cortexa53"
14 PACKAGE_EXTRA_ARCHS:tune-cortexa57-cortexa53 = "${PACKAGE_EXTRA_ARCHS:tune-armv8a-crc} cortexa57-co…
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H A Dtune-cortexa57.inc3 TUNEVALID[cortexa57] = "Enable Cortex-A57 specific processor optimizations"
4 TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa57', ' -mcpu=cortex-a57', '', d)}"
6 require conf/machine/include/arm/arch-armv8a.inc
9 AVAILTUNES += "cortexa57 cortexa57-crypto"
10 ARMPKGARCH:tune-cortexa57 = "cortexa57"
11 ARMPKGARCH:tune-cortexa57-crypto = "cortexa57-crypto"
12 # We do not want -march since -mcpu is added above to cover for it
13 TUNE_FEATURES:tune-cortexa57 = "aarch64 crc cortexa57"
14 TUNE_FEATURES:tune-cortexa57-crypto = "${TUNE_FEATURES:tune-cortexa57} crypto"
15 PACKAGE_EXTRA_ARCHS:tune-cortexa57 = "${PACKAGE_EXTRA_ARCHS:tune-armv8a-crc} cortexa57"
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/openbmc/qemu/tests/functional/
H A Dtest_aarch64_tuxrun.py12 # SPDX-License-Identifier: GPL-2.0-or-later
28 self.cpu='cortex-a57'
43 self.cpu='cortex-a57'
H A Dtest_aarch64_replay.py6 # SPDX-License-Identifier: GPL-2.0-or-later
27 self.cpu = 'cortex-a57'
33 check_call([qemu_img, 'create', '-f', 'qcow2', '-b', raw_disk,
34 '-F', 'raw', disk], stdout=DEVNULL, stderr=DEVNULL)
36 args = ('-drive', 'file=%s,snapshot=on,id=hd0,if=none' % disk,
37 '-drive', 'driver=blkreplay,id=hd0-rr,if=none,image=hd0',
38 '-device', 'virtio-blk-device,drive=hd0-rr',
39 '-netdev', 'user,id=vnet,hostfwd=:127.0.0.1:0-:22',
40 '-device', 'virtio-net,netdev=vnet',
41 '-object', 'filter-replay,id=replay,netdev=vnet')
H A Dtest_aarch64_sbsaref_freebsd.py5 # Copyright (c) 2023-2024 Linaro Ltd.
8 # Philippe Mathieu-Daudé
11 # SPDX-License-Identifier: GPL-2.0-or-later
21 ('http://ftp-archive.freebsd.org/pub/FreeBSD-Archive/old-releases/arm64'
22 '/aarch64/ISO-IMAGES/14.1/FreeBSD-14.1-RELEASE-arm64-aarch64-bootonly.iso.xz'),
29 self.set_machine('sbsa-ref')
36 "-drive", f"file={img_path},format=raw,snapshot=on",
39 self.vm.add_args("-cpu", cpu)
45 self.boot_freebsd14("cortex-a57")
55 self.boot_freebsd14("max,pauth-impdef=on")
H A Dtest_aarch64_sbsaref_alpine.py5 # Copyright (c) 2023-2024 Linaro Ltd.
8 # Philippe Mathieu-Daudé
11 # SPDX-License-Identifier: GPL-2.0-or-later
21 ('https://dl-cdn.alpinelinux.org/'
22 'alpine/v3.17/releases/aarch64/alpine-standard-3.17.2-aarch64.iso'),
29 self.set_machine('sbsa-ref')
36 "-drive", f"file={iso_path},media=cdrom,format=raw",
39 self.vm.add_args("-cpu", cpu)
45 self.boot_alpine_linux("cortex-a57")
54 self.boot_alpine_linux("max,pauth-impdef=on")
H A Dtest_aarch64_hotplug_pci.py10 # SPDX-License-Identifier: GPL-2.0-or-later
18 ('https://ftp.debian.org/debian/dists/trixie/main/installer-arm64/'
19 '20250803/images/netboot/debian-installer/arm64/linux'),
23 ('https://ftp.debian.org/debian/dists/trixie/main/installer-arm64/'
24 '20250803/images/netboot/debian-installer/arm64/initrd.gz'),
31 self.vm.add_args('-m', '512M',
32 '-cpu', 'cortex-a57',
33 '-append',
35 '-device',
36 'pcie-root-port,bus=pcie.0,chassis=1,slot=1,id=pcie.1',
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H A Dtest_aarch64_sbsaref.py5 # Copyright (c) 2023-2024 Linaro Ltd.
8 # Philippe Mathieu-Daudé
11 # SPDX-License-Identifier: GPL-2.0-or-later
23 aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0
27 - Trusted Firmware v2.12.0
28 - Tianocore EDK2 edk2-stable202411
29 - Tianocore EDK2-platforms 4b3530d
33 # Secure BootRom (TF-A code)
36 # Non-secure rom (UEFI and EFI variables)
44 "-drive", f"if=pflash,file={fs0_path},format=raw",
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H A Dtest_aarch64_xen.py11 # SPDX-License-Identifier: GPL-2.0-or-later
14 # later. See the COPYING file in the top-level directory.
37 self.cpu = "cortex-a57"
43 self.vm.add_args('-machine', 'virtualization=on',
44 '-m', '768',
45 '-kernel', xen_path,
46 '-append', self.XEN_COMMON_COMMAND_LINE,
47 '-device',
48 'guest-loader,addr=0x47000000,kernel=%s,bootargs=console=hvc0'
63 member="boot/xen-4.11-arm64")
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/openbmc/u-boot/doc/
H A DREADME.rmobile4 This README is about U-Boot support for Renesas's ARM Cortex-A9 based RMOBILE[1]
5 and Cortex-A9/A53/A57 based R-Car[2] family of SoCs. Renesas's RMOBILE/R-Car SoC
6 family contains an ARM Cortex-A9/A53/A57.
12 | R8A73A0 | KMC KZM-A9-GT [3] | kzm9g_config
13 | R8A7734 | Atmark-Techno Armadillo-800-EVA [4] | armadillo-800eva_config
17 |---------------+----------------------------------------+-------------------
18 | R8A7791 M2-W | Renesas Electronics Koelsch | koelsch_defconfig
20 |---------------+----------------------------------------+-------------------
22 |---------------+----------------------------------------+-------------------
23 | R8A7793 M2-N | Renesas Electronics Gose | gose_defconfig
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H A DREADME.qemu-arm1 # SPDX-License-Identifier: GPL-2.0+
5 U-Boot on QEMU's 'virt' machine on ARM & AArch64
9 virtualization purposes. This document describes how to run U-Boot under it.
10 Both 32-bit ARM and AArch64 are supported.
14 - A freely configurable amount of CPU cores
15 - U-Boot loaded and executing in the emulated flash at address 0x0
16 - A generated device tree blob placed at the start of RAM
17 - A freely configurable amount of RAM, described by the DTB
18 - A PL011 serial port, discoverable via the DTB
19 - An ARMv7/ARMv8 architected timer
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/openbmc/u-boot/arch/arm/mach-exynos/
H A DKconfig14 Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
33 Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and
34 Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs
44 Samsung Exynos7 SoC family are based on ARM Cortex-A57 CPU or
45 Cortex-A53 CPU (and some in a big.LITTLE configuration). There are
174 default "board/samsung/common/exynos-uboot-spl.lds" if ARCH_EXYNOS5 || ARCH_EXYNOS4
/openbmc/qemu/docs/system/arm/
H A Dcpu-features.rst10 Cortex-A15 and the Cortex-A57, which respectively implement Arm
11 architecture reference manuals ARMv7-A and ARMv8-A, may both optionally
12 implement PMUs. For example, if a user wants to use a Cortex-A15 without
13 a PMU, then the ``-cpu`` parameter should contain ``pmu=off`` on the QEMU
14 command line, i.e. ``-cpu cortex-a15,pmu=off``.
18 that implement the ARMv8-A architecture reference manual may optionally
20 ``aarch64`` CPU property. A CPU type such as the Cortex-A15, which does
21 not implement ARMv8-A, will not have the ``aarch64`` CPU property.
30 prefixed with "kvm-" and are described in "KVM VCPU Features".
36 CPU type is possible with the ``query-cpu-model-expansion`` QMP command.
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H A Dvirt.rst1 .. _arm-virt:
10 idiosyncrasies and limitations of a particular bit of real-world
18 ``virt-5.0`` machine type will behave like the ``virt`` machine from
19 the QEMU 5.0 release, and migration should work between ``virt-5.0``
20 of the 5.0 release and ``virt-5.0`` of the 5.1 release. Migration
22 the non-versioned ``virt`` machine type.
24 VM migration is not guaranteed when using ``-cpu max``, as features
33 - PCI/PCIe devices
34 - CXL Fixed memory windows, root bridges and devices.
35 - Flash memory
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/openbmc/u-boot/arch/arm/cpu/armv8/
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
7 #include <asm-offsets.h>
22 #include <asm/boot0-linux-kernel-header.h>
25 * Various SoCs need something special and SoC-specific up front in
45 .quad _end - _start
49 .quad __bss_start - _start
53 .quad __bss_end - _start
63 * Fix .rela.dyn relocations. This allows U-Boot to be loaded to and
67 adr x0, _start /* x0 <- Runtime value of _start */
68 ldr x1, _TEXT_BASE /* x1 <- Linked value of _start */
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/openbmc/openbmc/poky/meta/conf/machine/
H A Dqemuarm64.conf5 require conf/machine/include/arm/armv8a/tune-cortexa57.inc
10 PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot"
16 QB_SYSTEM_NAME = "qemu-system-aarch64"
17 QB_MACHINE = "-machine virt"
18 QB_CPU = "-cpu cortex-a57"
19 QB_SMP ?= "-smp 4"
20 QB_CPU_KVM = "-cpu host -machine gic-version=3"
22 QB_GRAPHICS = "-device virtio-gpu-pci"
23 QB_OPT_APPEND = "-device qemu-xhci -device usb-tablet -device usb-kbd"
25 QB_TAP_OPT = "-netdev tap,id=net0,ifname=@TAP@,script=no,downscript=no"
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/openbmc/qemu/tests/qtest/
H A Dmachine-none-test.c10 * See the COPYING file in the top-level directory.
27 { "arm", "cortex-a15" },
28 { "aarch64", "cortex-a57" },
29 { "avr", "avr6-avr-cpu" },
30 { "x86_64", "qemu64,apic-id=0" },
31 { "i386", "qemu32,apic-id=0" },
82 qts = qtest_initf("-machine none -cpu \"%s\"", cpu_model); in test_machine_cpu_cli()
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.soc13 ---------
14 The LS1043A integrated multicore processor combines four ARM Cortex-A53
20 - Four 64-bit ARM Cortex-A53 CPUs
21 - 1 MB unified L2 Cache
22 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
24 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
26 - Packet parsing, classification, and distribution (FMan)
27 - Queue management for scheduling, packet sequencing, and congestion
29 - Hardware buffer management for buffer allocation and de-allocation (BMan)
30 - Cryptography acceleration (SEC)
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/openbmc/qemu/include/hw/cpu/
H A Dcluster.h18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "hw/qdev-core.h"
33 * If CPUs are not identical (for example, Cortex-A53 and Cortex-A57 CPUs in an
57 #define TYPE_CPU_CLUSTER "cpu-cluster"
62 * 8 bit field (and uses all-1s for the default "not in any cluster").
/openbmc/u-boot/arch/arm/include/asm/
H A Dmacro.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * include/asm-arm/macro.h
5 * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
24 * caches are enabled or on a multi-core system.
81 * Branch if current processor is a Cortex-A57 core.
87 cmp \xreg, #0xD07 /* Cortex-A57 MPCore processor. */
92 * Branch if current processor is a Cortex-A53 core.
98 cmp \xreg, #0xD03 /* Cortex-A53 MPCore processor. */
108 /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */
130 /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/vk-gl-cts/
H A Dopengl-es-cts_3.2.12.0.bb3 require khronos-cts.inc
5 SRCREV_vk-gl-cts = "42e61858e862e153cd0fe36593a8c3f7c16c3275"
7 require opengl-es-cts-sources.inc
9 EXTRA_OECMAKE += "-DSELECTED_BUILD_TARGETS="cts-runner deqp-egl deqp-gles2 deqp-gles3 deqp-gles31 d…
12 install -d ${D}/${CTSDIR}
13 cp -r ${B}/external/openglcts/modules/* ${D}/${CTSDIR}
14 cp -r ${S}/external/openglcts/data/gl_cts/data/mustpass/ ${D}/${CTSDIR}/mustpass/
16 install -m 0755 ${B}/modules/egl/deqp-egl ${D}/${CTSDIR}
17 install -m 0755 ${B}/modules/gles2/deqp-gles2 ${D}/${CTSDIR}
18 install -m 0755 ${B}/modules/gles3/deqp-gles3 ${D}/${CTSDIR}
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/openbmc/qemu/tests/vm/
H A Dubuntu.aarch6412 # the COPYING file in the top-level directory.
21 'cpu' : "cortex-a57",
22 'machine' : "virt,gic-version=3",
23 'install_cmds' : "apt-get update,"\
24 "apt-get build-dep -y --arch-only qemu,"\
25 "apt-get install -y libfdt-dev pkg-config language-pack-en ninja-build",
39 image_name = "focal-server-cloudimg-arm64.img"
40 image_link = "https://cloud-images.ubuntu.com/focal/20220615/" + image_name
43 set -e;
44 cd $(mktemp -d);
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H A Daarch64vm.py11 # the COPYING file in the top-level directory.
23 'machine' : "virt,gic-version=max",
33 'machine' : "virt,gic-version=host"},
34 'tcg' : {'cpu' : "cortex-a57",
81 sys.stderr.write("*** please check --efi-aarch64 argument or "\
82 "install qemu-efi-aarch64 package\n")
100 pflash_args_str = "-drive file={},format=raw,if=pflash "\
101 "-drive file={},format=raw,if=pflash"
/openbmc/openbmc/poky/meta/recipes-extended/baremetal-example/
H A Dbaremetal-helloworld_git.bb2 HOMEPAGE = "https://github.com/aehs29/baremetal-helloqemu"
10 SRC_URI = "git://github.com/ahcbb6/baremetal-helloqemu.git;protocol=https;branch=master"
17 IMAGE_LINK_NAME ?= "baremetal-helloworld-image-${MACHINE}"
20 # Baremetal-Image creates the proper wiring, assumes the output is provided in
24 inherit baremetal-image
28 DEPENDS:qemux86:append = " nasm-native"
32 # machine that QEMU uses on OE, e.g. -machine virt -cpu cortex-a57
34 # such as vexpress-a15 by overriding the setting on the machine.conf
35 COMPATIBLE_MACHINE = "qemuarmv5|qemuarm|qemuarm64|qemuriscv64|qemuriscv32|qemux86|qemux86-64"
44 BAREMETAL_QEMUARCH:qemux86-64 = "x86-64"
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/openbmc/openbmc/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/
H A Dtrusted-firmware-a_%.bbappend1 COMPATIBLE_MACHINE:qemuarm64-secureboot = "qemuarm64-secureboot"
2 COMPATIBLE_MACHINE:qemuarm-secureboot = "qemuarm-secureboot"
4 #FIXME - clang fails to build tfa for qemuarm-secureboot, and possibly other
5 # arm/aarch32. This is a known testing hole in TF-A.
6 TOOLCHAIN:qemuarm-secureboot = "gcc"
9 FILESEXTRAPATHS:prepend:qemuarm64-secureboot := "${THISDIR}/files:"
10 SRC_URI:append:qemuarm64-secureboot = " \
11 file://0001-Add-spmc_manifest-for-qemu.patch \
14 TFA_PLATFORM:qemuarm64-secureboot = "qemu"
15 TFA_PLATFORM:qemuarm-secureboot = "qemu"
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