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/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dsolomon,ssd1307fb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Solomon SSD1307 OLED Controller Framebuffer
10 - Maxime Ripard <mripard@kernel.org>
11 - Javier Martinez Canillas <javierm@redhat.com>
17 - enum:
18 - solomon,ssd1305fb-i2c
19 - solomon,ssd1306fb-i2c
20 - solomon,ssd1307fb-i2c
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dsnps,dw-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DWC PCIe RP/EP controller
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
14 Generic Synopsys DesignWare PCIe Root Port and Endpoint controller
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
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/openbmc/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dtouchscreen.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Torokhov <dmitry.torokhov@gmail.com>
20 touchscreen-min-x:
25 touchscreen-min-y:
30 touchscreen-size-x:
34 touchscreen-size-y:
38 touchscreen-max-pressure:
39 description: maximum reported pressure (arbitrary range dependent on the controller)
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/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dst,stm32-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DMA Controller
10 The STM32 DMA is a general-purpose direct memory access controller capable of
12 DMA clients connected to the STM32 DMA controller must use the format
13 described in the dma.txt file, using a four-cell specifier for each
14 channel: a phandle to the DMA controller plus the following four integer cells:
18 dependent:
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H A Datmel-dma.txt1 * Atmel Direct Memory Access Controller (DMA)
4 - compatible: Should be "atmel,<chip>-dma".
5 - reg: Should contain DMA registers location and length.
6 - interrupts: Should contain DMA interrupt.
7 - #dma-cells: Must be <2>, used to represent the number of integer cells in
13 compatible = "atmel,at91sam9g45-dma";
16 #dma-cells = <2>;
19 DMA clients connected to the Atmel DMA controller must use the format
20 described in the dma.txt file, using a three-cell specifier for each channel:
24 1. A phandle pointing to the DMA controller.
[all …]
H A Dsocionext,uniphier-mio-dmac.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/dma/socionext,uniphier-mio-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier Media IO DMA controller
14 - Masahiro Yamada <yamada.masahiro@socionext.com>
17 - $ref: dma-controller.yaml#
21 const: socionext,uniphier-mio-dmac
29 The number of interrupt lines is SoC-dependent.
37 '#dma-cells':
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/openbmc/linux/Documentation/driver-api/memory-devices/
H A Dti-emif.rst1 .. SPDX-License-Identifier: GPL-2.0
4 TI EMIF SDRAM Controller Driver
29 SoCs. EMIF is an SDRAM controller that, based on its revision,
32 functions of the driver includes re-configuring AC timing
38 DDR device details and other board dependent and SoC dependent
41 - DDR device details: 'struct ddr_device_info'
42 - Device AC timings: 'struct lpddr2_timings' and 'struct lpddr2_min_tck'
43 - Custom configurations: customizable policy options through
45 - IP revision
46 - PHY type
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H A Dti-gpmc.rst1 .. SPDX-License-Identifier: GPL-2.0
4 GPMC (General Purpose Memory Controller)
7 GPMC is an unified memory controller dedicated to interfacing external
14 * Pseudo-SRAM devices
85 4. read async non-muxed
107 6. read sync non-muxed
131 8. write async non-muxed
157 10. write sync non-muxed
172 Many of gpmc timings are dependent on other gpmc timings (a few
173 gpmc timings purely dependent on other gpmc timings, a reason that
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dnxp,imx8-isi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI
17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
22 - fsl,imx8mn-isi
23 - fsl,imx8mp-isi
24 - fsl,imx93-isi
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/openbmc/linux/include/drm/
H A Ddrm_panel.h17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
44 * struct drm_panel_funcs - perform operations on a given panel
46 * The .prepare() function is typically called before the display controller
52 * After the display controller has started transmitting video data, it's safe
59 * Before stopping video transmission from the display controller it can be
63 * is visible on the panel. It is then safe for the display controller to
144 * Allows panels to create panels-specific debugfs files.
169 * Dependent device callbacks; should be initted by the caller.
183 * The panel we're dependent on; set by drm_panel_add_follower().
189 * struct drm_panel - DRM panel object
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/openbmc/linux/Documentation/devicetree/bindings/reset/
H A Dst,stih407-powerdown.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/st,stih407-powerdown.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STi family Sysconfig Peripheral Powerdown Reset Controller
10 - Srinivas Kandagatla <srinivas.kandagatla@st.com>
13 This binding describes a reset controller device that is used to enable and
14 disable on-chip peripheral controllers such as USB and SATA, using
16 registers. These have been grouped together into a single reset controller
19 The actual action taken when powerdown is asserted is hardware dependent.
[all …]
H A Dst,stih407-picophyreset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/st,stih407-picophyreset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STi family Sysconfig Picophy SoftReset Controller
10 - Peter Griffin <peter.griffin@linaro.org>
13 This binding describes a reset controller device that is used to enable and
14 disable on-chip PicoPHY USB2 phy(s) using "softreset" control bits found in
17 The actual action taken when softreset is asserted is hardware dependent.
24 const: st,stih407-picophyreset
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H A Dst,sti-softreset.txt1 STMicroelectronics STi family Sysconfig Peripheral SoftReset Controller
4 This binding describes a reset controller device that is used to enable and
5 disable on-chip peripheral controllers such as USB and SATA, using
9 The actual action taken when softreset is asserted is hardware dependent.
15 controller binding usage.
18 - compatible: Should be "st,stih407-softreset";
19 - #reset-cells: 1, see below
23 softreset: softreset-controller {
24 #reset-cells = <1>;
25 compatible = "st,stih407-softreset";
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H A Dimg,pistachio-reset.txt1 Pistachio Reset Controller
4 This binding describes a reset controller device that is used to enable and
8 The actual action taken when soft reset is asserted is hardware dependent.
14 for common reset controller binding usage.
18 - compatible: Contains "img,pistachio-reset"
20 - #reset-cells: Contains 1
25 compatible = "img,pistachio-cr-periph", "syscon", "simple-mfd";
28 clock-names = "sys";
29 #clock-cells = <1>;
31 pistachio_reset: reset-controller {
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/i2c/
H A Dmipi-ccs.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2014--2020 Intel Corporation
4 ---
5 $id: http://devicetree.org/schemas/media/i2c/mipi-ccs.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sakari Ailus <sakari.ailus@linux.intel.com>
17 <URL:https://www.mipi.org/specifications/camera-command-set>.
24 Documentation/devicetree/bindings/media/video-interfaces.txt .
29 - items:
30 - const: mipi-ccs-1.1
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/openbmc/linux/drivers/media/platform/microchip/
H A Dmicrochip-isc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Microchip Image Sensor Controller (ISC) driver header file
5 * Copyright (C) 2016-2019 Microchip Technology, Inc.
13 #include <linux/clk-provider.h>
16 #include <media/v4l2-ctrls.h>
17 #include <media/v4l2-device.h>
18 #include <media/videobuf2-dma-contig.h>
57 * struct isc_format - ISC media bus format information
98 * struct fmt_config - ISC format configuration and internal pipeline
164 * struct isc_reg_offsets - ISC device register offsets
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/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Daspeed,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: ASPEED SD/SDIO/MMC Controller
11 - Andrew Jeffery <andrew@aj.id.au>
12 - Ryan Chen <ryanchen.aspeed@gmail.com>
15 The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO
20 the slots are dependent on the common configuration area, they are described
26 - aspeed,ast2400-sd-controller
27 - aspeed,ast2500-sd-controller
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/openbmc/linux/drivers/staging/media/deprecated/atmel/
H A Datmel-isc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Microchip Image Sensor Controller (ISC) driver header file
5 * Copyright (C) 2016-2019 Microchip Technology, Inc.
13 #include <linux/clk-provider.h>
16 #include <media/v4l2-ctrls.h>
17 #include <media/v4l2-device.h>
18 #include <media/videobuf2-dma-contig.h>
57 * struct isc_format - ISC media bus format information
97 * struct fmt_config - ISC format configuration and internal pipeline
163 * struct isc_reg_offsets - ISC device register offsets
[all …]
/openbmc/linux/Documentation/infiniband/
H A Dopa_vnic.rst2 Intel Omni-Path (OPA) Virtual Network Interface Controller (VNIC)
5 Intel Omni-Path (OPA) Virtual Network Interface Controller (VNIC) feature
6 supports Ethernet functionality over Omni-Path fabric by encapsulating
11 The patterns of exchanges of Omni-Path encapsulated Ethernet packets
12 involves one or more virtual Ethernet switches overlaid on the Omni-Path
13 fabric topology. A subset of HFI nodes on the Omni-Path fabric are
26 +-------------------+
30 +-------------------+
35 +-----------------------------+ +------------------------------+
37 | +---------+ +---------+ | | +---------+ +---------+ |
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/openbmc/linux/arch/powerpc/include/asm/
H A Ddbdma.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Definitions for using the Apple Descriptor-Based DMA controller
13 * DBDMA control/status registers. All little-endian.
43 * DBDMA command structure. These fields are all little-endian!
47 __le16 command; /* command word (has bit-fields) */
49 __le32 cmd_dep; /* command-dependent field */
67 #define KEY_STREAM2 0x200 /* device-dependent stream */
68 #define KEY_STREAM3 0x300 /* device-dependent stream */
70 #define KEY_SYSTEM 0x600 /* system memory-mapped space */
71 #define KEY_DEVICE 0x700 /* device memory-mapped space */
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/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dboard.c1 // SPDX-License-Identifier: GPL-2.0+
39 * Miscellaneous platform dependent initialisations
44 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; in board_init()
66 count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", in board_usb_init()
69 if (count <= 0) /* No controller found. */ in board_usb_init()
72 addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); in board_usb_init()
74 printf("UDC Controller has no 'reg' property!\n"); in board_usb_init()
75 return -EINVAL; in board_usb_init()
78 /* Patch the address from OF into the controller pdata. */ in board_usb_init()
/openbmc/u-boot/doc/device-tree-bindings/i2c/
H A Di2c-mux.txt4 numbered uniquely in a device dependent manner. The nodes for an i2c bus
9 - #address-cells = <1>;
10 - #size-cells = <0>;
13 - #address-cells = <1>;
14 - #size-cells = <0>;
15 - reg : The sub-bus number.
18 - Other properties specific to the multiplexer/switch hardware.
19 - Child nodes conforming to i2c bus binding
33 #address-cells = <1>;
34 #size-cells = <0>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dci-hdrc-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB2 ChipIdea USB controller
10 - Xu Yang <xu.yang_2@nxp.com>
11 - Peng Fan <peng.fan@nxp.com>
16 - enum:
17 - chipidea,usb2
18 - lsi,zevio-usb
[all …]
/openbmc/linux/arch/arm/mm/
H A Dl2c-l2x0-resume.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * L2C-310 early resume code. This can be used by platforms to restore
4 * the settings of their L2 cache controller before restoring the
11 #include <asm/hardware/cache-l2x0.h>
21 @ r1 = phys address of L2C-310 controller
34 @ The prefetch and power control registers are revision dependent
60 1: .long l2x0_saved_regs - .
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
14 uniquely in a device dependent manner. The nodes for an i2c bus
18 i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for
19 populating the i2c child busses. If an 'i2c-mux' subnode is present, only
24 pattern: '^(i2c-?)?mux'
26 '#address-cells':
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