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/openbmc/linux/drivers/greybus/
H A Dcontrol.c1 // SPDX-License-Identifier: GPL-2.0
3 * Greybus CPort control protocol.
14 /* Highest control-protocol version supported */
18 static int gb_control_get_version(struct gb_control *control) in gb_control_get_version() argument
20 struct gb_interface *intf = control->connection->intf; in gb_control_get_version()
28 ret = gb_operation_sync(control->connection, in gb_control_get_version()
33 dev_err(&intf->dev, in gb_control_get_version()
34 "failed to get control-protocol version: %d\n", in gb_control_get_version()
40 dev_err(&intf->dev, in gb_control_get_version()
41 "unsupported major control-protocol version (%u > %u)\n", in gb_control_get_version()
[all …]
/openbmc/linux/drivers/pinctrl/renesas/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
9 bool "Renesas SoC pin control support" if COMPILE_TEST && !(ARCH_RENESAS || SUPERH)
57 This enables pin control drivers for Renesas SuperH and ARM platforms
65 This enables common pin control functionality for EMMA Mobile, R-Car,
66 R-Mobile, RZ/G, SH, and SH-Mobile platforms.
73 This enables pin control and GPIO drivers for SH/SH Mobile platforms
82 bool "pin control support for Emma Mobile EV2" if COMPILE_TEST
86 bool "pin control support for R-Car D3" if COMPILE_TEST
90 bool "pin control support for R-Car E2" if COMPILE_TEST
94 bool "pin control support for R-Car E3" if COMPILE_TEST
[all …]
/openbmc/linux/include/media/
H A Dv4l2-ctrls.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 #include <media/media-request.h>
29 * union v4l2_ctrl_ptr - A pointer to a control value.
30 * @p_s32: Pointer to a 32-bit signed value.
31 * @p_s64: Pointer to a 64-bit signed value.
32 * @p_u8: Pointer to a 8-bit unsigned value.
33 * @p_u16: Pointer to a 16-bit unsigned value.
34 * @p_u32: Pointer to a 32-bit unsigned value.
97 * v4l2_ctrl_ptr_create() - Helper function to return a v4l2_ctrl_ptr from a
109 * struct v4l2_ctrl_ops - The control operations that the driver has to provide.
[all …]
/openbmc/linux/arch/sh/include/mach-common/mach/
H A Dhighlander.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #define PA_SDPOW (-1)
13 #define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
14 #define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
19 #define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */
20 #define PA_PCIBD (PA_BCR+0x000e) /* PCI Board detect control */
21 #define PA_PCICD (PA_BCR+0x0010) /* PCI Connector detect control */
22 #define PA_EXTGIO (PA_BCR+0x0016) /* Extension GPIO Control */
23 #define PA_IVDRMON (PA_BCR+0x0018) /* iVDR Moniter control */
24 #define PA_IVDRCTL (PA_BCR+0x001a) /* iVDR control */
[all …]
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ras_eeprom.c37 * chips strung on the I2C bus, usually by manipulating pins 1-3 of a
49 * 54h = 1010100b => --"--, bits 18:16 = 100b, address 40000h.
50 * 56h = 1010110b => --"--, bits 18:16 = 110b, address 60000h.
53 * the status of pins 1-3. See top of amdgpu_eeprom.c.
77 * ---------------------------------
82 * ---------------------------------
86 * ---------------------------------
89 /* Assume 2-Mbit size EEPROM and take up the whole space. */
94 #define RAS_MAX_RECORD_COUNT ((RAS_TBL_SIZE_BYTES - RAS_TABLE_HEADER_SIZE) \
99 * ---------------------------------
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/openbmc/bmcweb/redfish-core/schema/dmtf/json-schema/
H A DControl.v1_5_2.json2 "$id": "http://redfish.dmtf.org/schemas/v1/Control.v1_5_2.json",
3 "$ref": "#/definitions/Control",
4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
5 …"copyright": "Copyright 2014-2024 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
12 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
26 "#Control.ResetToDefaults": {
31 "description": "The available OEM-specific actions for this resource.",
32 …"longDescription": "This property shall contain the available OEM-specific actions for this resour…
37 "Control": { object
39 "description": "The `Control` schema describes a control point and its properties.",
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/openbmc/linux/include/sound/
H A Dseq_midi_emul.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
35 unsigned char control[128]; /* Current value of all controls */ member
62 unsigned char gs_master_volume; /* SYSEX master volume: 0-127 */
73 void (*control)(void *private_data, int type, struct snd_midi_channel *chan); member
84 /* 0-127 controller values */
91 * The usage is eg: chan->gm_bank_select. Another implementation would
94 #define gm_bank_select control[0]
95 #define gm_modulation control[1]
96 #define gm_breath control[2]
97 #define gm_foot_pedal control[4]
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/openbmc/linux/Documentation/userspace-api/media/drivers/
H A Duvcvideo.rst1 .. SPDX-License-Identifier: GPL-2.0
6 This file documents some driver-specific aspects of the UVC driver, such as
7 driver-specific ioctls and implementation notes.
10 linux-media@vger.kernel.org.
14 ---------------------------
19 The UVC specification allows for vendor-specific extensions through extension
23 - through mappings of XU controls to V4L2 controls
24 - through a driver-specific ioctl interface
28 control enumeration.
30 The second mechanism requires uvcvideo-specific knowledge for the application to
[all …]
/openbmc/bmcweb/redfish-core/schema/dmtf/csdl/
H A DControl_v1.xml1 <?xml version="1.0" encoding="UTF-8"?>
2 <!---->
3 <!--################################################################################ -->
4 <!--# Redfish Schema: Control v1.5.2 -->
5 <!--# -->
6 <!--# For a detailed change log, see the README file contained in the DSP8010 bundle, -->
7 <!--# available at http://www.dmtf.org/standards/redfish -->
8 <!--# Copyright 2014-2024 DMTF. -->
9 <!--# For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright -->
10 <!--################################################################################ -->
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun50i_h6.h6 * SPDX-License-Identifier: GPL-2.0+
13 u32 pll1_cfg; /* 0x000 pll1 (cpux) control */
15 u32 pll5_cfg; /* 0x010 pll5 (ddr) control */
17 u32 pll6_cfg; /* 0x020 pll6 (periph0) control */
19 u32 pll_periph1_cfg; /* 0x028 pll periph1 control */
21 u32 pll7_cfg; /* 0x030 pll7 (gpu) control */
23 u32 pll3_cfg; /* 0x040 pll3 (video0) control */
25 u32 pll_video1_cfg; /* 0x048 pll video1 control */
27 u32 pll4_cfg; /* 0x058 pll4 (ve) control */
29 u32 pll10_cfg; /* 0x060 pll10 (de) control */
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/openbmc/linux/drivers/tty/vt/
H A Ddefkeymap.map1 # SPDX-License-Identifier: GPL-2.0
3 keymaps 0-2,4-5,8,12
5 # keymaps 0-2,4-6,8,12
7 # altgr control keycode 83 = Boot
8 # altgr control keycode 111 = Boot
20 control keycode 3 = nul
21 shift control keycode 3 = nul
24 control keycode 4 = Escape
27 control keycode 5 = Control_backslash
30 control keycode 6 = Control_bracketright
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/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dvidioc-queryctrl.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_QUERYCTRL - VIDIOC_QUERY_EXT_CTRL - VIDIOC_QUERYMENU - Enumerate controls and menu control i…
41 To query the attributes of a control applications set the ``id`` field
42 of a struct :ref:`v4l2_queryctrl <v4l2-queryctrl>` and call the
49 exclusive ``V4L2_CID_LASTP1``. Drivers may return ``EINVAL`` if a control in
56 in the ``flags`` field this control is permanently disabled and should
60 driver returns the next supported non-compound control, or ``EINVAL`` if
63 type ≥ ``V4L2_CTRL_COMPOUND_TYPES`` and/or array control, in other words
71 control information that cannot be returned in struct
72 :ref:`v4l2_queryctrl <v4l2-queryctrl>` since that structure is full.
[all …]
H A Dextended-controls.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _extended-controls:
13 The control mechanism as originally designed was meant to be used for
19 implementing this extended control mechanism: the MPEG standard is quite
27 Unfortunately, the original control API lacked some features needed for
29 named) extended control API.
32 Extended Control API, nowadays there are also other classes of Extended
38 The Extended Control API
48 control). This is needed since it is often required to atomically change
53 contains a pointer to the control array, a count of the number of
[all …]
H A Dvidioc-g-ext-ctrls.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_EXT_CTRLS - VIDIOC_S_EXT_CTRLS - VIDIOC_TRY_EXT_CTRLS - Get or set the value of several co…
43 atomically. Control IDs are grouped into control classes (see
44 :ref:`ctrl-class`) and all controls in the control array must belong
45 to the same control class.
60 If the ``size`` is too small to receive the control result (only
61 relevant for pointer-type controls like strings), then the driver will
63 should re-allocate the memory to this new size and try again. For the
70 N-dimensional arrays are set and retrieved row-by-row. You cannot set a
79 control values are valid.
[all …]
/openbmc/linux/include/linux/mfd/
H A Dmotorola-cpcap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2007-2009 Motorola, Inc.
47 #define CPCAP_REG_VERSC1 0x0048 /* Version Control 1 */
48 #define CPCAP_REG_VERSC2 0x004c /* Version Control 2 */
54 #define CPCAP_REG_UCC1 0x0210 /* UC Control 1 */
55 #define CPCAP_REG_UCC2 0x0214 /* UC Control 2 */
60 #define CPCAP_REG_PGC 0x0228 /* Power Gate and Control */
66 #define CPCAP_REG_SCC 0x0400 /* System Clock Control */
80 #define CPCAP_REG_SI2CC1 0x0604 /* Switcher I2C Control 1 */
81 #define CPCAP_REG_Si2CC2 0x0608 /* Switcher I2C Control 2 */
[all …]
/openbmc/phosphor-dbus-interfaces/gen/xyz/openbmc_project/Control/
H A Dmeson.build24 sdbusplus_current_path = 'xyz/openbmc_project/Control'
27 'xyz/openbmc_project/Control/CFMLimit__markdown'.underscorify(),
28 input: [ '../../../../yaml/xyz/openbmc_project/Control/CFMLimit.interface.yaml', ],
32 sdbuspp_gen_meson_prog, '--command', 'markdown',
33 '--output', meson.current_build_dir(),
34 '--tool', sdbusplusplus_prog,
35 '--directory', meson.current_source_dir() / '../../../../yaml',
36 'xyz/openbmc_project/Control/CFMLimit',
44 'xyz/openbmc_project/Control/ChassisCapabilities__markdown'.underscorify(),
45 input: [ '../../../../yaml/xyz/openbmc_project/Control/ChassisCapabilities.interface.yaml', ],
[all …]
/openbmc/linux/Documentation/driver-api/media/
H A Dv4l2-controls.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
9 The V4L2 control API seems simple enough, but quickly becomes very hard to
15 1) How do I add a control?
16 2) How do I set the control's value? (i.e. s_ctrl)
20 3) How do I get the control's value? (i.e. g_volatile_ctrl)
21 4) How do I validate the user's proposed control value? (i.e. try_ctrl)
25 The control framework was created in order to implement all the rules of the
29 Note that the control framework relies on the presence of a struct
31 sub-device drivers.
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-lpc32xx/
H A Dclk.h1 /* SPDX-License-Identifier: GPL-2.0+ */
14 /* Clocking and Power Control Registers */
17 u32 boot_map; /* Boot Map Control Register */
19 u32 usbdiv_ctrl; /* USB Clock Pre-Divide Register */
30 /* Clock Control Registers */
31 u32 hclkdiv_ctrl; /* HCLK Divider Control Register */
32 u32 pwr_ctrl; /* Power Control Register */
33 u32 pll397_ctrl; /* PLL397 Control Register */
34 u32 osc_ctrl; /* Main Oscillator Control Register */
35 u32 sysclk_ctrl; /* SYSCLK Control Register */
[all …]
/openbmc/linux/include/linux/greybus/
H A Dcontrol.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Greybus CPort control protocol
33 int gb_control_enable(struct gb_control *control);
34 void gb_control_disable(struct gb_control *control);
35 int gb_control_suspend(struct gb_control *control);
36 int gb_control_resume(struct gb_control *control);
37 int gb_control_add(struct gb_control *control);
38 void gb_control_del(struct gb_control *control);
39 struct gb_control *gb_control_get(struct gb_control *control);
40 void gb_control_put(struct gb_control *control);
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmicrel-ksz90x1.txt8 Note that these settings are applied after any phy-specific fixup from
14 All skew control options are specified in picoseconds. The minimum
17 skew values actually increase in 120ps steps, starting from -840ps. The
28 -----------------------------------------------------
29 0 -840ps 0000
30 200 -720ps 0001
31 400 -600ps 0010
32 600 -480ps 0011
33 800 -360ps 0100
34 1000 -240ps 0101
[all …]
/openbmc/linux/drivers/media/i2c/
H A Dadv7183_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * adv7183 - Analog Devices ADV7183 video decoder registers
11 #define ADV7183_IN_CTRL 0x00 /* Input control */
13 #define ADV7183_OUT_CTRL 0x03 /* Output control */
14 #define ADV7183_EXT_OUT_CTRL 0x04 /* Extended output control */
21 #define ADV7183_ADI_CTRL 0x0E /* ADI control */
27 #define ADV7183_ANAL_CLAMP_CTRL 0x14 /* Analog clamp control */
28 #define ADV7183_DIGI_CLAMP_CTRL_1 0x15 /* Digital clamp control 1 */
29 #define ADV7183_SHAP_FILT_CTRL 0x17 /* Shaping filter control */
30 #define ADV7183_SHAP_FILT_CTRL_2 0x18 /* Shaping filter control 2 */
[all …]
/openbmc/linux/drivers/pinctrl/mediatek/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
51 bool "MediaTek MT7620 pin control"
58 bool "MediaTek MT7621 pin control"
65 bool "MediaTek MT76X8 pin control"
72 bool "Ralink RT2880 pin control"
79 bool "Ralink RT305X pin control"
86 bool "Ralink RT3883 pin control"
94 bool "MediaTek MT2701 pin control"
101 bool "MediaTek MT7623 pin control with generic binding"
108 bool "MediaTek MT7629 pin control"
[all …]
/openbmc/openbmc/meta-phosphor/recipes-phosphor/settings/phosphor-settings-defaults/
H A Dhost-template.yaml1 /xyz/openbmc_project/control/host{}/auto_reboot:
2 - Interface: xyz.openbmc_project.Control.Boot.RebootPolicy
7 /xyz/openbmc_project/control/host{}/auto_reboot/one_time:
8 - Interface: xyz.openbmc_project.Control.Boot.RebootPolicy
13 /xyz/openbmc_project/control/host{}/boot:
14 - Interface: xyz.openbmc_project.Control.Boot.Source
18 - Interface: xyz.openbmc_project.Control.Boot.Mode
22 - Interface: xyz.openbmc_project.Control.Boot.Type
26 - Interface: xyz.openbmc_project.Object.Enable
31 /xyz/openbmc_project/control/host{}/boot/one_time:
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/openbmc/phosphor-webui/app/common/styles/components/
H A Dform-elements.scss4 padding-top: .5em;
5 padding-bottom: .5em;
6 padding-left: .5em;
7 padding-right: 1.5em;
8 margin-top: 0;
9 border: 1px solid $border-color-02;
10 min-width: 70px;
11 font-weight: 400;
12 @include bgImage__arrowDown-primary;
14 @include bgImage__arrowDown-disabled;
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/openbmc/u-boot/arch/arm/include/asm/arch-s32v234/
H A Dmc_me_regs.h1 /* SPDX-License-Identifier: GPL-2.0+ */
112 /* DEC200 Peripheral Control Register */
114 /* 2D-ACE Peripheral Control Register */
116 /* ENET Peripheral Control Register */
118 /* DMACHMUX0 Peripheral Control Register */
120 /* CSI0 Peripheral Control Register */
122 /* MMDC0 Peripheral Control Register */
124 /* FRAY Peripheral Control Register */
126 /* PIT0 Peripheral Control Register */
128 /* FlexTIMER0 Peripheral Control Register */
[all …]

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