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/openbmc/linux/drivers/regulator/
H A Dpwm-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 - STMicroelectronics Inc.
31 /* Voltage table */
34 /* Continuous mode info */
35 struct pwm_continuous_reg_data continuous; member
52 * Voltage table call-backs
61 pwm_get_state(drvdata->pwm, &pwm_state); in pwm_regulator_init_state()
64 for (i = 0; i < rdev->desc->n_voltages; i++) { in pwm_regulator_init_state()
65 if (dutycycle == drvdata->duty_cycle_table[i].dutycycle) { in pwm_regulator_init_state()
66 drvdata->state = i; in pwm_regulator_init_state()
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/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dpwm-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/pwm-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
11 - Lee Jones <lee@kernel.org>
12 - Alexandre Courbot <acourbot@nvidia.com>
17 Voltage Table:
18 When in this mode, a voltage table (See below) of predefined voltage <=>
19 duty-cycle values must be provided via DT. Limitations are that the
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H A Drichtek,rt5739.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Richtek RT5739 Step-Down Buck Converter
10 - ChiYuan Huang <cy_huang@richtek.com>
13 The RT5739 is a step-down switching buck converter that can deliver the
14 programmable output voltage from 300mV to 1300mV with wide input voltage
15 supply of 2.5V to 5.5V. It can provide up to 3.5A continuous current
19 - $ref: regulator.yaml#
24 - richtek,rt5733
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H A Drichtek,rtq2208.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alina Yu <alina_yu@richtek.com>
14 multi-configurable synchronous buck converters and two LDOs.
16 Bucks support "regulator-allowed-modes" and "regulator-mode". The former defines the permitted
20 operation modes for all buck rails, automatic power saving mode (Auto mode) and forced continuous
25 0 - Auto mode for power saving, which reducing the switching frequency at light load condition
27 …1 - FCCM to meet the strict voltage regulation accuracy, which keeping constant switching frequenc…
35 - richtek,rtq2208
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/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Daspeed,ast2600-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Billy Tsai <billy_tsai@aspeedtech.com>
13 • 10-bits resolution for 16 voltage channels.
14 • The device split into two individual engine and each contains 8 voltage
16 • Channel scanning can be non-continuous.
21 • Built-in a compensating method.
22 • Built-in a register to trim internal reference voltage.
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H A Dnxp,imx93-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haibo Chen <haibo.chen@nxp.com>
13 The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels
15 One-Shot and Scan (continuous) conversions. Programmable DMA
18 also has Self-test logic and Software-initiated calibration.
22 const: nxp,imx93-adc
29 - description: WDGnL, watchdog threshold interrupt requests.
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H A Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
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/openbmc/u-boot/drivers/pwm/
H A DKconfig2 bool "Enable support for pulse-width modulation devices (PWM)"
5 A pulse-width modulator emits a pulse of varying width and provides
7 is often used to control a voltage level. The more time the PWM
8 spends in the 'high' state, the higher the voltage. The PWM's
17 supports a programmable period and duty cycle. A 32-bit counter is
26 programmable period and duty cycle. A 32-bit counter is used.
28 continuous/single-shot) are not supported by the driver.
52 programmable period and duty cycle. A 16-bit counter is used.
/openbmc/linux/arch/arm/mach-omap2/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
160 bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2"
164 Say Y to enable AVS(Adaptive Voltage Scaling)
172 initialized and not enabled. To enable the automatic voltage
187 Class 3 implementation of Smartreflex employs continuous hardware
188 voltage calibration.
195 lost during off-mode entry on HS/EMU devices. This feature
196 requires support from PPA / boot-loader in HS/EMU devices, which
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-class-power-twl403012 "continuous" activate mode described as "linear" in
15 when voltage drops.
19 be taken that battery is not over-charged.
/openbmc/openbmc-test-automation/xcat/
H A Dtest_xcat_group.robot110 Continuous Node Power Status
172 Get Voltage Reading Via XCAT
173 [Documentation] Get voltage via XCAT.
180 # Get voltage reading from each BMC node.
183 ${voltage}= Get Hardware Vitals Via XCAT ${bmc} voltage
184 Log \n Voltage reading on $[bmc}\n ${voltage}
211 ${cmd_output}= Execute Command ${XCAT_DIR_PATH}/lsxcatd -v
/openbmc/linux/Documentation/hwmon/
H A Dsysfs-interface.rst5 through the sysfs interface. Since lm-sensors 3.0.0, libsensors is
6 completely chip-independent. It assumes that all the kernel drivers
10 This is a major improvement compared to lm-sensors 2.
22 For this reason, even if we aim at a chip-independent libsensors, it will
37 Up to lm-sensors 3.0.0, libsensors looks for hardware monitoring attributes
38 in the "physical" device directory. Since lm-sensors 3.0.1, attributes found
48 types for sensor chips are "in" (voltage), "temp" (temperature) and
61 to cause an alarm) is chip-dependent.
69 ----------------
76 -------------------------------------------------------------------------
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/openbmc/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dbrcm,iproc-touchscreen.txt4 - compatible: must be "brcm,iproc-touchscreen"
5 - ts_syscon: handler of syscon node defining physical base
9 - clocks: The clock provided by the SOC to driver the tsc
10 - clock-names: name for the clock
11 - interrupts: The touchscreen controller's interrupt
12 - address-cells: Specify the number of u32 entries needed in child nodes.
14 - size-cells: Specify number of u32 entries needed to specify child nodes size
18 - scanning_period: Time between scans. Each step is 1024 us. Valid 1-256.
19 - debounce_timeout: Each step is 512 us. Valid 0-255
20 - settling_timeout: The settling duration (in ms) is the amount of time
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/openbmc/u-boot/doc/device-tree-bindings/adc/
H A Dst,stm32-adc.txt3 STM32 ADC is a successive approximation analog-to-digital converter.
5 in single, continuous, scan or discontinuous mode. Result of the ADC is
6 stored in a left-aligned or right-aligned 32-bit data register.
10 voltage goes beyond the user-defined, higher or lower thresholds.
16 - regular conversion can be done in sequence, running in background
17 - injected conversions have higher priority, and so have the ability to
22 -----------------------------------
24 - compatible: Should be one of:
25 "st,stm32f4-adc-core"
26 "st,stm32h7-adc-core"
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/openbmc/linux/drivers/iio/adc/
H A Dad7291.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AD7291 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor
5 * Copyright 2010-2011 Analog Devices Inc.
26 * If no events enabled - single polled channel read
30 * The noise-delayed bit as per datasheet suggestion is always enabled.
83 u16 c_mask; /* Active voltage channels for events */
89 struct i2c_client *client = chip->client; in ad7291_i2c_read()
94 dev_err(&client->dev, "I2C read error\n"); in ad7291_i2c_read()
105 return i2c_smbus_write_word_swapped(chip->client, reg, data); in ad7291_i2c_write()
126 command = chip->command | AD7291_ALERT_CLEAR; in ad7291_event_handler()
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/openbmc/linux/drivers/media/dvb-frontends/
H A Dcx24123.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver
7 * Support for KWorld DVB-S 100 by Vadim Catana <skystar@moldova.cc>
9 * Support for CX24123/CX24113-NIM by Patrick Boettcher <pb@linuxtv.org>
26 "(1-9, default:off).");
197 {0x0d, 0x7f}, /* Force driver to shift until the maximum (+-10 MHz) */
198 {0x0e, 0x03}, /* Default non-inverted, FEC 3/4 (default) */
210 {0x2c, 0x00}, /* DiSEqC Message (0x2c - 0x31) */
217 {0x33, 0x00}, /* Interrupts off (0x33 - 0x34) */
229 {0x67, 0x83}, /* Non-DCII symbol clock */
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/openbmc/linux/drivers/media/pci/ddbridge/
H A Dddbridge.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2010-2017 Digital Devices GmbH
50 #define DDBRIDGE_VERSION "0.9.33-integrated"
115 u8 con_clock; /* use a continuous clock */
171 enum fe_sec_voltage voltage; member
175 enum fe_sec_voltage voltage);
283 u32 voltage[4]; member
354 /* ddbridge-core.c */
/openbmc/linux/drivers/input/touchscreen/
H A Dwm9705.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm9705.c -- Codec driver for Wolfson WM9705 AC97 Codec.
55 * required between the switch matrix applying a voltage across the
147 dev_dbg(wm->dev, in wm9705_phy_init()
150 dev_dbg(wm->dev, in wm9705_phy_init()
158 dev_dbg(wm->dev, "supplied delay out of range."); in wm9705_phy_init()
164 dev_dbg(wm->dev, "setting adc sample delay to %d u Secs.", in wm9705_phy_init()
169 dev_dbg(wm->dev, "setting pdd to Vmid/%d", 1 - (pdd & 0x000f)); in wm9705_phy_init()
182 wm->dig[2] | WM97XX_PRP_DET_DIG); in wm9705_dig_enable()
186 wm->dig[2] & ~WM97XX_PRP_DET_DIG); in wm9705_dig_enable()
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H A Dwm9713.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm9713.c -- Codec touch driver for Wolfson WM9713 AC97 Codec.
68 * required between the switch matrix applying a voltage across the
87 MODULE_PARM_DESC(five_wire, "Set to '1' to use 5-wire touchscreen.");
163 dev_info(wm->dev, "setting pen detect pull-up to %d Ohms\n", in wm9713_phy_init()
170 dev_info(wm->dev, "setting 5-wire touchscreen mode."); in wm9713_phy_init()
173 dev_warn(wm->dev, in wm9713_phy_init()
183 dev_info(wm->dev, in wm9713_phy_init()
186 dev_info(wm->dev, in wm9713_phy_init()
193 dev_info(wm->dev, "supplied delay out of range."); in wm9713_phy_init()
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/openbmc/linux/drivers/iio/imu/inv_icm42600/
H A Dinv_icm42600.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
69 /* ODR suffixed by LN or LP are Low-Noise or Low-Power mode only */
88 /* Low-Noise mode sensor data filter (3rd order filter by default) */
91 /* Low-Power mode sensor data filter (averaging) */
102 #define INV_ICM42600_SENSOR_CONF_INIT {-1, -1, -1, -1}
117 * struct inv_icm42600_state - driver state variables
122 * @vdd_supply: VDD voltage regulator for the chip.
123 * @vddio_supply: I/O voltage regulator for the chip.
190 /* all sensor data are 16 bits (2 registers wide) in big-endian */
198 #define INV_ICM42600_DATA_INVALID -32768
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/openbmc/linux/drivers/rtc/
H A Drtc-ds1742.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * - nvram size determined from resource
9 * - this ds1742 driver now supports ds1743.
58 void __iomem *ioaddr = pdata->ioaddr_rtc; in ds1742_rtc_set_time()
61 century = bin2bcd((tm->tm_year + 1900) / 100); in ds1742_rtc_set_time()
65 writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR); in ds1742_rtc_set_time()
66 writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH); in ds1742_rtc_set_time()
67 writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY); in ds1742_rtc_set_time()
68 writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE); in ds1742_rtc_set_time()
69 writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS); in ds1742_rtc_set_time()
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/openbmc/linux/drivers/cpufreq/
H A DKconfig.arm1 # SPDX-License-Identifier: GPL-2.0-only
14 is based on an abstract continuous scale of CPU
42 module will be called sun50i-cpufreq-nvmem.
96 Some Broadcom STB SoCs use a co-processor running proprietary firmware
97 ("AVS") to handle voltage and frequency scaling. This driver provides
103 tristate "Calxeda Highbank-based"
128 based on cpufreq-dt.
239 we will fall-back so safe-values contained in Device Tree. Enable
277 use the cpufreq-dt driver on all Texas Instruments platforms that
278 provide dt based operating-points-v2 tables with opp-supported-hw
/openbmc/linux/drivers/iio/pressure/
H A Dzpa2326.c1 // SPDX-License-Identifier: GPL-2.0-only
18 * ZPA2326 hardware supports 2 sampling mode: one shot and continuous.
29 * The continuous mode works according to a periodic hardware measurement
34 * - get device out of low power mode,
35 * - setup hardware sampling period,
36 * - at end of period, upon data ready interrupt: pop pressure samples out of
38 * - when no longer needed, stop sampling process by putting device into
70 /* 200 ms should be enough for the longest conversion time in one-shot mode. */
78 * struct zpa2326_frequency - Hardware sampling frequency descriptor
102 ARRAY_SIZE(zpa2326_sampling_frequencies) - 1]; in zpa2326_highest_frequency()
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/openbmc/linux/drivers/hwmon/
H A Dina238.c1 // SPDX-License-Identifier: GPL-2.0-only
53 /* 16 sample averaging, 1052us conversion time, continuous mode */
70 * Current (A) = (shunt voltage register * 5) * calibration / 81920
72 * The maximum shunt voltage is 163.835 mV (0x7fff, ADC_RANGE = 0, gain = 4).
80 * bus voltage is 102396.875 mV, 0x7fff), where the maximum power that can
118 /* 24-bit register read */ in ina238_read_reg24()
123 return -EIO; in ina238_read_reg24()
158 return -EOPNOTSUPP; in ina238_read_in()
181 return -EOPNOTSUPP; in ina238_read_in()
185 return -EOPNOTSUPP; in ina238_read_in()
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H A Dina3221.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * INA3221 Triple Current/Voltage Monitor
5 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
10 #include <linux/hwmon-sysfs.h>
53 #define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x))
70 /* Alert Flags: SF is the summation-alert flag */
98 * struct ina3221_input - channel input source specific information
110 * struct ina3221_data - device specific information
118 * @single_shot: running in single-shot operating mode
136 return ina->summation_shunt_resistor != 0; in ina3221_is_enabled()
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