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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dlantiq,pinctrl-xway.txt47 spi_cs3, spi_cs4, spi_cs5, spi_cs6, asc, stp, gpt1, gpt2, gpt3, clkout0,
58 gpt1, gpt2, gpt3, clkout0, clkout1, clkout2, clkout3, gnt1, gnt2, gnt3,
69 spi_cs6, asc0, asc0 cts rts, stp, nmi, gpt1, gpt2, gpt3, clkout0, clkout1,
84 stp, nmi, gpt1, gpt2, gpt3, clkout0, clkout1, clkout2, clkout3, gnt1,
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsilabs,si5351.txt86 * overwrite clkout0 configuration with:
93 clkout0 {
H A Dti,lmk04832.yaml198 clkout0@0 {
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-xway.c198 GRP_MUX("clkout0", CGU, ase_pins_clkout0),
211 static const char * const ase_cgu_grps[] = {"clkout0", "clkout1",
361 GRP_MUX("clkout0", CGU, danube_pins_clkout0),
384 static const char * const danube_cgu_grps[] = {"clkout0", "clkout1",
569 GRP_MUX("clkout0", CGU, xrx100_pins_clkout0),
595 static const char * const xrx100_cgu_grps[] = {"clkout0", "clkout1",
809 GRP_MUX("clkout0", CGU, xrx200_pins_clkout0),
841 static const char * const xrx200_cgu_grps[] = {"clkout0", "clkout1",
1009 /* CLKOUT0 is not available on xrX300 */
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Ddove-cubox.dts104 clkout0 {
/openbmc/linux/sound/soc/sh/rcar/
H A Dadg.c514 * this means all clkout0/1/2/3 will be same rate in rsnd_adg_get_clkout()
626 * this means all clkout0/1/2/3 will be * same rate in rsnd_adg_get_clkout()
644 * for clkout0/1/2/3 in rsnd_adg_get_clkout()
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62-verdin.dtsi609 pinctrl_eth_clock: main-system-clkout0-default-pins {
611 AM62X_IOPAD(0x01f0, PIN_OUTPUT_PULLUP, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */
754 pinctrl_csi1_mclk: wkup-clkout0-default-pins {
H A Dk3-am625-beagleplay.dts393 AM62X_IOPAD(0x01f0, PIN_OUTPUT, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4210.dtsi509 clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
H A Dexynos4x12.dtsi647 clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
H A Ds3c64xx-pinctrl.dtsi442 clkout0: clkout-0-pins { label
/openbmc/linux/arch/mips/lantiq/xway/
H A Dsysctrl.c402 name = kzalloc(sizeof("clkout0"), GFP_KERNEL); in clkdev_add_clkout()
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77995.dtsi1049 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
H A Dr8a774c0.dtsi1326 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
H A Dr8a77990.dtsi1478 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
H A Dr8a77965.dtsi1743 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
H A Dr8a774b1.dtsi1574 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
H A Dr8a774a1.dtsi1690 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
H A Dr8a77961.dtsi1760 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
H A Dr8a77960.dtsi1880 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
H A Dr8a774e1.dtsi1786 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-pinctrl.dtsi170 cam_clkout0: cam-clkout0 {
H A Drk3399.dtsi2753 test_clkout0: test-clkout0 {
/openbmc/u-boot/arch/arm/dts/
H A Dr8a7796.dtsi1667 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
H A Dr8a7795.dtsi1793 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;

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