| /openbmc/linux/drivers/clk/ |
| H A D | clk-pwm.c | 14 struct clk_pwm { struct
20 static inline struct clk_pwm *to_clk_pwm(struct clk_hw *hw) in to_clk_pwm() argument
22 return container_of(hw, struct clk_pwm, hw); in to_clk_pwm()
27 struct clk_pwm *clk_pwm = to_clk_pwm(hw); in clk_pwm_prepare() local
29 return pwm_enable(clk_pwm->pwm); in clk_pwm_prepare()
34 struct clk_pwm *clk_pwm = to_clk_pwm(hw); in clk_pwm_unprepare() local
36 pwm_disable(clk_pwm->pwm); in clk_pwm_unprepare()
42 struct clk_pwm *clk_pwm = to_clk_pwm(hw); in clk_pwm_recalc_rate() local
44 return clk_pwm->fixed_rate; in clk_pwm_recalc_rate()
49 struct clk_pwm *clk_pwm = to_clk_pwm(hw); in clk_pwm_get_duty_cycle() local
[all …]
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| /openbmc/linux/arch/arm64/boot/dts/qcom/ |
| H A D | msm8916-samsung-gt510.dts | 12 clk_pwm: pwm { label
61 pwms = <&clk_pwm 0 100000>;
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| H A D | msm8916-samsung-a5u-eur.dts | 53 &clk_pwm {
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| H A D | msm8916-samsung-a2015-common.dtsi | 28 clk_pwm: pwm { label
191 pwms = <&clk_pwm 0 100000>;
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| H A D | msm8916-samsung-a3u-eur.dts | 84 &clk_pwm {
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| /openbmc/linux/drivers/pwm/ |
| H A D | pwm-sprd.c | 218 struct clk *clk_pwm; in sprd_pwm_clk_init() local
239 clk_pwm = chn->clks[SPRD_PWM_CHN_OUTPUT_CLK].clk; in sprd_pwm_clk_init()
240 chn->clk_rate = clk_get_rate(clk_pwm); in sprd_pwm_clk_init()
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| /openbmc/linux/Documentation/devicetree/bindings/pwm/ |
| H A D | pwm-bcm2835.yaml | 41 clocks = <&clk_pwm>;
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | exynos5410.h | 49 #define CLK_PWM 279 macro
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| H A D | exynos5250.h | 115 #define CLK_PWM 311 macro
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| H A D | s5pv210.h | 155 #define CLK_PWM 137 macro
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| H A D | exynos5420.h | 88 #define CLK_PWM 279 macro
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| H A D | exynos4.h | 174 #define CLK_PWM 336 macro
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| H A D | exynos3250.h | 208 #define CLK_PWM 202 macro
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| /openbmc/linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-msm8974-lge-nexus5-hammerhead.dts | 44 clk_pwm: pwm { label
56 pwms = <&clk_pwm 0 100000>;
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| /openbmc/linux/drivers/clk/hisilicon/ |
| H A D | crg-hi3516cv300.c | 113 { HI3516CV300_PWM_CLK, "clk_pwm", "pwm_mux", CLK_SET_RATE_PARENT,
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos5410.c | 213 GATE(CLK_PWM, "pwm", "aclk66", GATE_IP_PERIC, 24, 0, 0),
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| H A D | clk-s5pv210.c | 571 GATE(CLK_PWM, "pwm", "dout_pclkp", CLK_GATE_IP3, 23, 0, 0),
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| H A D | clk-exynos5250.c | 598 GATE(CLK_PWM, "pwm", "div_aclk66", GATE_IP_PERIC, 24, 0, 0),
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| /openbmc/linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos5410.dtsi | 329 clocks = <&clock CLK_PWM>;
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| H A D | s5pv210.dtsi | 289 clocks = <&clocks CLK_PWM>;
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| H A D | exynos4.dtsi | 665 clocks = <&clock CLK_PWM>;
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| H A D | exynos5250.dtsi | 1175 clocks = <&clock CLK_PWM>;
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| H A D | exynos5420.dtsi | 1298 clocks = <&clock CLK_PWM>;
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| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk-rv1108.c | 627 COMPOSITE(SCLK_PWM, "clk_pwm", mux_pll_src_2plls_p, 0,
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| H A D | clk-rk3328.c | 465 COMPOSITE(SCLK_PWM, "clk_pwm", mux_2plls_p, 0,
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