| /openbmc/linux/Documentation/devicetree/bindings/gpio/ |
| H A D | xlnx,gpio-xilinx.yaml | 52 description: This option sets this GPIO channel1 bits in input mode.
60 description: This option sets this GPIO channel1 bits in output mode.
69 channel1.
80 description: The value defines the bit width of the GPIO channel1.
110 of each bit of GPIO channel1.
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| /openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | fsl,imx8qxp-ldb.yaml | 24 have to be different. Channel0 outputs odd pixels and channel1 outputs
30 data. In split mode, channel0 outputs odd pixels and channel1 outputs even
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| /openbmc/linux/Documentation/devicetree/bindings/net/can/ |
| H A D | renesas,rcar-canfd.yaml | 105 - channel1
202 channel1 {
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| /openbmc/linux/drivers/mfd/ |
| H A D | mxs-lradc.c | 58 DEFINE_RES_IRQ_NAMED(MX23_LRADC_CH1_IRQ, "mxs-lradc-channel1"),
77 DEFINE_RES_IRQ_NAMED(MX28_LRADC_CH1_IRQ, "mxs-lradc-channel1"),
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| /openbmc/linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a779g0-white-hawk.dts | 40 channel1 {
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| H A D | r8a779a0-falcon.dts | 53 channel1 {
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| H A D | rz-smarc-common.dtsi | 98 channel1 {
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| /openbmc/linux/Documentation/devicetree/bindings/phy/ |
| H A D | fsl,imx8qm-lvds-phy.yaml | 37 Index 0 is for LVDS channel0 and index 1 is for LVDS channel1.
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| /openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| H A D | jedec,lpddr-channel.yaml | 125 lpddr-channel1 {
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| /openbmc/u-boot/board/freescale/mx6qarm2/ |
| H A D | imximage_mx6dl.cfg | 250 /* Channel1 - starting address 0x10000000 */
289 /* Channel1 : Configure DDR device:*/
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| /openbmc/linux/drivers/edac/ |
| H A D | pnd2_edac.c | 671 bool channel1; in sys2pmi() local
675 channel1 = mot_hit ? ((bool)((addr >> mot_intlv_bit) & 1)) : in sys2pmi()
677 *pmiidx |= (u32)channel1; in sys2pmi()
703 bool channel1; in sys2pmi() local
710 channel1 = (addr >> mot_intlv_bit) & 1; in sys2pmi()
713 channel1 = hash_by_mask(contig_addr, chan_hash_mask); in sys2pmi()
716 *pmiidx |= (u32)channel1; in sys2pmi()
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| /openbmc/linux/tools/virtio/virtio-trace/ |
| H A D | README | 65 id=channel1,name=trace-path-cpu0\
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| /openbmc/linux/drivers/gpu/drm/bridge/imx/ |
| H A D | imx8qm-ldb.c | 239 "failed to power on channel1 PHY: %d\n", in imx8qm_ldb_bridge_atomic_enable()
274 "failed to power off channel1 PHY: %d\n", in imx8qm_ldb_bridge_atomic_disable()
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| H A D | imx8qxp-ldb.c | 509 * transmits odd pixels and channel1 transmits even pixels. in imx8qxp_ldb_parse_dt_companion()
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| /openbmc/linux/arch/arm/mach-spear/ |
| H A D | time.c | 33 #define CLKSRC 1 /* gpt0, channel1 as clocksource */
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| /openbmc/linux/sound/soc/codecs/ |
| H A D | adau1373.c | 669 SOC_DAPM_SINGLE("DSP Channel1 Switch", _reg, 0, 1, 0), \
761 SOC_MIXER_ARRAY("DSP Channel1 Mixer", SND_SOC_NOPM, 0, 0,
862 { _sink, "DSP Channel1 Switch", "DSP Channel1 Mixer" }, \
908 DSP_CHANNEL_MIXER_ROUTES("DSP Channel1 Mixer"),
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| H A D | da7218.c | 745 SOC_SINGLE("AGS Channel1 Switch", DA7218_AGS_ENABLE,
783 SOC_DOUBLE_EXT("ALC Channel1 Switch", DA7218_ALC_CTRL1,
805 SOC_DOUBLE_EXT("Mic Level Detect Channel1 Switch", DA7218_LVL_DET_CTRL,
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| /openbmc/linux/drivers/media/platform/ti/davinci/ |
| H A D | vpif.h | 271 /* inline function to enable/disable channel1 */
302 /* inline function to enable interrupt for channel1 */
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| H A D | vpif.c | 261 /* Channel1 */
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| /openbmc/openbmc/meta-phosphor/recipes-phosphor/ipmi/phosphor-ipmi-config/ |
| H A D | cs_privilege_levels.json | 20 "Channel1": { object
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| /openbmc/linux/drivers/iio/adc/ |
| H A D | mxs-lradc-adc.c | 44 "mxs-lradc-channel1",
55 "mxs-lradc-channel1",
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| /openbmc/linux/arch/arm/boot/dts/marvell/ |
| H A D | dove.dtsi | 333 channel1 {
353 channel1 {
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| /openbmc/linux/include/sound/ |
| H A D | ak4117.h | 77 #define AK4117_CS12 (1<<5) /* channel status select, 0 = channel1, 1 = channel2 */
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| /openbmc/u-boot/drivers/spi/ |
| H A D | omap3_spi.c | 105 /* channel1: 0x40 - 0x50, bus 0 & 1 */
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| /openbmc/linux/drivers/gpu/drm/kmb/ |
| H A D | kmb_dsi.c | 529 * REG_VSYNC_WIDTH0: [15:0]-VSA for channel0, [31:16]-VSA for channel1 in mipi_tx_fg_cfg_regs()
635 * REG_MC_FIFO_CHAN_ALLOC0: [8:0]-channel0, [24:16]-channel1 in mipi_tx_multichannel_fifo_cfg()
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