Home
last modified time | relevance | path

Searched +full:cbom +full:- +full:block +full:- +full:size (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/arch/riscv/mm/
H A Dcacheflush.c1 // SPDX-License-Identifier: GPL-2.0-only
30 * Performs an icache flush for the given MM context. RISC-V has no direct
34 * single-hart processes on a many-hart machine, ie 'make -j') we avoid the
47 mask = &mm->context.icache_stale_mask; in flush_icache_mm()
60 if (mm == current->active_mm && local) { in flush_icache_mm()
87 if (!test_bit(PG_dcache_clean, &folio->flags)) { in flush_icache_pte()
89 set_bit(PG_dcache_clean, &folio->flags); in flush_icache_pte()
129 /* set block-size for cbom and/or cboz extension if available */ in riscv_init_cbo_blocksizes()
130 cbo_get_block_size(node, "riscv,cbom-block-size", in riscv_init_cbo_blocksizes()
132 cbo_get_block_size(node, "riscv,cboz-block-size", in riscv_init_cbo_blocksizes()
H A Ddma-noncoherent.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V specific functions to support DMA for non-coherent devices
8 #include <linux/dma-direct.h>
9 #include <linux/dma-map-ops.h>
12 #include <asm/dma-noncoherent.h>
18 static inline void arch_dma_cache_wback(phys_addr_t paddr, size_t size) in arch_dma_cache_wback() argument
24 noncoherent_cache_ops.wback(paddr, size); in arch_dma_cache_wback()
28 ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); in arch_dma_cache_wback()
31 static inline void arch_dma_cache_inv(phys_addr_t paddr, size_t size) in arch_dma_cache_inv() argument
37 noncoherent_cache_ops.inv(paddr, size); in arch_dma_cache_inv()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/riscv/
H A Dcpus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V CPUs
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
12 - Conor Dooley <conor@kernel.org>
15 This document uses some terminology common to the RISC-V community
19 mandated by the RISC-V ISA: a PC and some registers. This
27 - $ref: /schemas/cpu.yaml#
[all …]
/openbmc/linux/arch/riscv/kernel/
H A Dcpufeature.c1 // SPDX-License-Identifier: GPL-2.0-only
27 #include "copy-unaligned.h"
29 #define NUM_ALPHA_EXTS ('z' - 'a' + 1)
33 #define MISALIGNED_COPY_SIZE ((MISALIGNED_BUFFER_SIZE / 2) - 0x80)
40 /* Per-cpu ISA extensions. */
47 * riscv_isa_extension_base() - Get base extension word
63 * __riscv_isa_extension_available() - Check whether given extension
88 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_isa_extension_check()
91 pr_err("Zicbom disabled as cbom-block-size present, but is not a power-of-2\n"); in riscv_isa_extension_check()
97 pr_err("Zicboz detected in ISA string, but no cboz-block-size found\n"); in riscv_isa_extension_check()
[all …]
/openbmc/qemu/hw/riscv/
H A Dvirt-acpi-build.c4 * RISC-V virt ACPI generation
6 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
10 * Copyright (C) 2021-2023 Ventana Micro Systems Inc
27 #include "hw/acpi/acpi-defs.h"
29 #include "hw/acpi/aml-build.h"
34 #include "hw/pci-host/gpex.h"
37 #include "hw/virtio/virtio-acpi.h"
40 #include "qemu/error-report.h"
58 * Align size to multiple of given size. This reduces the chance in acpi_align_size()
59 * we need to change size in the future (breaking cross version migration). in acpi_align_size()
[all …]
H A Dvirt.c2 * QEMU RISC-V VirtIO Board
6 * RISC-V machine with 16550a UART and VirtIO MMIO
23 #include "qemu/error-report.h"
24 #include "qemu/guest-random.h"
29 #include "hw/qdev-properties.h"
30 #include "hw/char/serial-mm.h"
32 #include "hw/core/sysbus-fdt.h"
36 #include "hw/riscv/riscv-iommu-bits.h"
46 #include "hw/platform-bus.h"
55 #include "hw/pci-host/gpex.h"
[all …]
/openbmc/linux/include/acpi/
H A Dactbl2.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
6 * Copyright (C) 2000 - 2023, Intel Corp.
51 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
59 * All tables must be byte-packed to match the ACPI specification, since
69 * essentially useless for dealing with packed data in on-disk formats or
78 * AEST - Arm Error Source Table
89 /* Common Subtable header - one per Node Structure (Subtable) */
246 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
266 * APMT - ARM Performance Monitoring Unit Table
[all …]