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/openbmc/linux/drivers/net/mdio/
H A DKconfig61 This module provides a driver for the MDIO busses found in the
93 This module provides a driver for the MDIO busses found in the
100 This module provides a driver for the Broadcom UniMAC MDIO busses.
113 Supports GPIO lib-based MDIO busses.
122 This module provides a driver for the MDIO busses found in the
217 multiplexers which connect one of several child MDIO busses
218 to a parent bus. Switching between child busses is done by
272 several child MDIO busses to a parent bus. Child bus
283 bus multiplexer connects one of several child MDIO busses to
294 The multiplexer connects one of several child MDIO busses to a
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mux.yaml13 An i2c bus multiplexer/switch will have several child busses that are numbered
18 i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for
19 populating the i2c child busses. If an 'i2c-mux' subnode is present, only
20 subnodes of this will be considered as i2c child busses.
H A Di2c-fsi.txt1 Device-tree bindings for FSI-attached I2C master and busses
11 - child nodes : Nodes to describe busses off the I2C
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dvideo-interfaces.yaml61 a device is partitioned into multiple data busses, e.g. 16-bit input port
62 divided into two separate ITU-R BT.656 8-bit busses. In such case bus-width
104 Number of data lines actively used, valid for the parallel busses.
110 On the parallel data busses, if bus-width is used to specify the number of
173 lane. This property is valid for serial busses only (e.g. MIPI CSI-2).
183 clock lane on hardware lane 0. This property is valid for serial busses
210 (normal). This property is valid for serial busses only.
/openbmc/linux/drivers/i2c/muxes/
H A DKconfig28 I2C busses connected through a MUX, which is controlled
41 I2C busses connected through a MUX, which in turn is controlled
96 I2C busses connected through a MUX, which is controlled
116 I2C busses connected through a MUX, which is controlled
/openbmc/libmctp/
H A Dcore.c308 mctp_bus_destroy(&mctp->busses[mctp->n_busses], mctp); in mctp_cleanup()
332 return &mctp->busses[0]; in find_bus_for_eid()
340 /* todo: multiple busses */ in mctp_register_bus()
347 memset(mctp->busses, 0, sizeof(struct mctp_bus)); in mctp_register_bus()
348 mctp->busses[0].mctp = mctp; in mctp_register_bus()
349 mctp->busses[0].binding = binding; in mctp_register_bus()
350 mctp->busses[0].eid = eid; in mctp_register_bus()
351 binding->bus = &mctp->busses[0]; in mctp_register_bus()
381 * have no more busses in mctp_unregister_bus()
398 memset(mctp->busses, 0, 2 * sizeof(struct mctp_bus)); in mctp_bridge_busses()
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H A Dcore-internal.h12 /* Must be >= 2 for bridge busses */
101 struct mctp_bus busses[MCTP_MAX_BUSSES]; member
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmctp-i2c-controller.yaml17 slave functionality. I2C busses (either directly or as subordinate mux
18 busses) are attached to the mctp-i2c-controller with a 'mctp-controller'
56 // Mux topology with multiple MCTP-handling busses under
/openbmc/linux/Documentation/devicetree/bindings/w1/
H A Dw1.txt1 Generic devicetree bindings for onewire (w1) busses
4 Onewire busses are described through nodes of their master bus controller.
/openbmc/u-boot/drivers/axi/
H A DKconfig4 Support AXI (Advanced eXtensible Interface) busses, a on-chip
9 These types of busses expose a virtual address space that can be
/openbmc/rest-dbus/
H A Drest-dbus13 busses = {
92 'busses': [{'name': x} for x in busses.keys()],
228 busfn = busses.get(self.bus_name, None)
313 busfn = busses.get(parts.pop(0), None)
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dmipi-dsi-bus.txt1 MIPI DSI (Display Serial Interface) busses
35 supporting such a configuration generally requires the data on both the busses
76 busses. Each DSI bus/channel drives some portion of the pixel data (generally
78 The graph bindings should be used to represent the multiple DSI busses that are
/openbmc/linux/drivers/i2c/busses/
H A Di2c-amd-mp2-pci.c212 i2c_common = privdata->busses[bus_id]; in amd_mp2_irq_isr()
256 if (privdata->busses[i2c_common->bus_id]) { in amd_mp2_register_cb()
261 privdata->busses[i2c_common->bus_id] = i2c_common; in amd_mp2_register_cb()
271 privdata->busses[i2c_common->bus_id] = NULL; in amd_mp2_unregister_cb()
395 i2c_common = privdata->busses[bus_id]; in amd_mp2_pci_suspend()
426 i2c_common = privdata->busses[bus_id]; in amd_mp2_pci_resume()
H A Di2c-amd-mp2.h172 * @busses: MP2 devices may have up to two busses,
181 struct amd_i2c_common *busses[2]; member
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmsi.txt8 used with other busses, and hence a mechanism is required to relate devices on
9 those busses to the MSI controllers which they are capable of using,
73 When #msi-cells is non-zero, busses with an msi-parent will require
/openbmc/qemu/hw/ppc/
H A Dpnv_i2c.c36 return i2c->busses[port]; in pnv_i2c_get_bus()
312 val |= (uint64_t)i2c_bus_busy(i2c->busses[i]) << i; in pnv_i2c_xscom_read()
512 bus_cold_reset(BUS(i2c->busses[port])); in pnv_i2c_sys_reset()
524 error_setg(errp, "Invalid number of busses: %u", i2c->num_busses); in pnv_i2c_realize()
531 i2c->busses = g_new(I2CBus *, i2c->num_busses); in pnv_i2c_realize()
536 i2c->busses[i] = i2c_init_bus(dev, name); in pnv_i2c_realize()
549 DEFINE_PROP_UINT32("num-busses", PnvI2C, num_busses, 1),
/openbmc/qemu/hw/usb/
H A Dbus.c53 static QTAILQ_HEAD(, USBBus) busses = QTAILQ_HEAD_INITIALIZER(busses);
93 QTAILQ_INSERT_TAIL(&busses, bus, next); in usb_bus_new()
100 QTAILQ_REMOVE(&busses, bus, next); in usb_bus_release()
346 QTAILQ_FOREACH(bus, &busses, next) { in usb_register_companion()
608 if (QTAILQ_EMPTY(&busses)) { in qmp_x_query_usb()
613 QTAILQ_FOREACH(bus, &busses, next) { in qmp_x_query_usb()
634 USBBus *bus = QTAILQ_FIRST(&busses); in usbdevice_create()
/openbmc/linux/Documentation/driver-api/media/
H A Dtx-rx.rst15 The following busses are the most common. This section discusses these two only.
28 `BT.601`_ and `BT.656`_ are the most common parallel busses.
38 bus. These are common for both busses.
/openbmc/linux/arch/alpha/include/asm/
H A Dpci.h13 * The following structure is used to manage multiple PCI busses.
19 /* A controller. Used to manage multiple PCI busses. */
/openbmc/linux/arch/parisc/include/asm/
H A Dpci.h13 ** Newer platforms number the busses across PCI bus adapters *sparsely*.
148 * But legacy platforms also need to renumber the busses below a Host
156 * the busses rather than treat each Dino as a separate PCI domain.
/openbmc/linux/arch/powerpc/include/asm/
H A Dpmac_low_i2c.h37 /* multibus : device node holds multiple busses, bus number is
43 /* i2c busses in the system */
/openbmc/linux/include/linux/
H A Dof_platform.h75 /* Platform devices and busses creation */
95 /* Platform devices and busses creation */
/openbmc/u-boot/drivers/core/
H A DKconfig238 busses #address-cells should equal 2, with the first cell being
246 not included and any such busses used in DT will be treated as
247 typical simple-bus compatible busses. This will lead to
/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dspi-bus.txt1 SPI (Serial Peripheral Interface) busses
3 SPI busses can be described with a node for the SPI master device
/openbmc/linux/arch/powerpc/platforms/powermac/
H A Dlow_i2c.c12 * powermac that covers the various types of i2c busses used in Apple machines.
14 * banging busses found on older chipsets in earlier machines if we ever need
599 /* Probe keywest-i2c busses */ in kw_i2c_probe()
611 * nodes) might cause us to not create some busses that are in kw_i2c_probe()
613 * want to work around that by creating busses without a node in kw_i2c_probe()
915 * type as older device trees mix i2c busses and other things in smu_i2c_probe()
1451 * Initialize us: probe all i2c busses on the machine, instantiate
1452 * busses and platform functions as needed.
1463 /* Probe keywest-i2c busses */ in pmac_i2c_init()
1467 /* Probe PMU i2c busses */ in pmac_i2c_init()
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