/openbmc/linux/Documentation/devicetree/bindings/rng/ |
H A D | brcm,bcm2835.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/rng/brcm,bcm2835.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: BCM2835/6368 Random number generator 10 - Stefan Wahren <stefan.wahren@i2se.com> 11 - Florian Fainelli <f.fainelli@gmail.com> 12 - Herbert Xu <herbert@gondor.apana.org.au> 17 - brcm,bcm2835-rng 18 - brcm,bcm-nsp-rng [all …]
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/openbmc/linux/drivers/char/hw_random/ |
H A D | bcm2835-rng.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2010-2012 Broadcom. All rights reserved. 22 /* enable rng */ 31 struct hwrng rng; member 38 static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng) in to_rng_priv() argument 40 return container_of(rng, struct bcm2835_rng_priv, rng); in to_rng_priv() 46 * peripheral registers for CPU-native byte order. in rng_readl() 49 return __raw_readl(priv->base + offset); in rng_readl() 51 return readl(priv->base + offset); in rng_readl() 58 __raw_writel(val, priv->base + offset); in rng_writel() [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 # Makefile for HW Random Number Generator (RNG) device drivers. 6 obj-$(CONFIG_HW_RANDOM) += rng-core.o 7 rng-core-y := core.o 8 obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o 9 obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o 10 obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o 11 obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o 12 obj-$(CONFIG_HW_RANDOM_BA431) += ba431-rng.o 13 obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # Hardware Random Number Generator (RNG) configuration 13 module will be called rng-core. This provides a device 28 This driver provides kernel-side support for a generic Random 31 the default FPGA bitstream on the TS-7800 has such functionality. 34 module will be called timeriomem-rng. 43 This driver provides kernel-side support for the Random Number 44 Generator hardware found on Intel i8xx-based motherboards. 47 module will be called intel-rng. 57 This driver provides kernel-side support for the Random Number [all …]
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/openbmc/linux/arch/arm/boot/dts/broadcom/ |
H A D | bcm2835-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 * bcm2835, bcm2836 and bcm2837 implementations. 8 interrupt-parent = <&intc>; 11 dma: dma-controller@7e007000 { 12 compatible = "brcm,bcm2835-dma"; 25 /* dma channel 11-14 share one irq */ 32 interrupt-names = "dma0", 47 "dma-shared-all"; 48 #dma-cells = <1>; 49 brcm,dma-channel-mask = <0x7f35>; [all …]
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H A D | bcm2711.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/soc/bcm2835-pm.h> 10 #address-cells = <2>; 11 #size-cells = <1>; 13 interrupt-parent = <&gicv2>; 16 compatible = "brcm,bcm2711-vc5"; 20 clk_27MHz: clk-27M { 21 #clock-cells = <0>; 22 compatible = "fixed-clock"; [all …]
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/openbmc/qemu/hw/arm/ |
H A D | bcm2835_peripherals.c | 9 * See the COPYING file in the top-level directory. 23 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */ 27 * According to Linux driver & DTS, dma channels 0--10 have separate IRQ, 28 * while channels 11--14 share one IRQ: 44 memory_region_add_subregion_overlap(&ps->peri_mr, ofs, in create_unimp() 45 sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000); in create_unimp() 54 object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG); in bcm2835_peripherals_init() 57 object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL); in bcm2835_peripherals_init() 60 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO); in bcm2835_peripherals_init() 62 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci", in bcm2835_peripherals_init() [all …]
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/openbmc/qemu/include/hw/misc/ |
H A D | bcm2835_rng.h | 2 * BCM2835 Random Number Generator emulation 7 * See the COPYING file in the top-level directory. 16 #define TYPE_BCM2835_RNG "bcm2835-rng"
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H A D | stm32l4x5_rcc_internals.h | 4 * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr> 5 * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr> 7 * SPDX-License-Identifier: GPL-2.0-or-later 10 * See the COPYING file in the top-level directory. 13 * for STM32L4x5 and STM32L4x6 advanced Arm ® -based 32-bit MCUs. 15 * Inspired by the BCM2835 CPRMAN clock manager implementation by Luc Michel. 24 #define TYPE_RCC_CLOCK_MUX "stm32l4x5-rcc-clock-mux" 25 #define TYPE_RCC_PLL "stm32l4x5-rcc-pll" 401 pll->id = id; in set_pll_init_info() 402 pll->vco_multiplier = 1; in set_pll_init_info() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | brcm,bcm2835-armctrl-ic.txt | 1 BCM2835 Top-Level ("ARMCTRL") Interrupt Controller 3 The BCM2835 contains a custom top-level interrupt controller, which supports 4 72 interrupt sources using a 2-level register scheme. The interrupt 9 interrupts, but the per-CPU interrupt controller is the root, and an 14 - compatible : should be "brcm,bcm2835-armctrl-ic" or 15 "brcm,bcm2836-armctrl-ic" 16 - reg : Specifies base physical address and size of the registers. 17 - interrupt-controller : Identifies the node as an interrupt controller 18 - #interrupt-cells : Specifies the number of cells needed to encode an 28 Additional required properties for brcm,bcm2836-armctrl-ic: [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | bcm283x.dtsi | 1 #include <dt-bindings/pinctrl/bcm2835.h> 2 #include <dt-bindings/clock/bcm2835.h> 3 #include <dt-bindings/clock/bcm2835-aux.h> 4 #include <dt-bindings/gpio/gpio.h> 6 /* firmware-provided startup stubs live here, where the secondary CPUs are 12 * bcm2835 and bcm2836 implementations, leaving the CPU configuration to 13 * bcm2835.dtsi and bcm2836.dtsi. 17 compatible = "brcm,bcm2835"; 18 model = "BCM2835"; 19 interrupt-parent = <&intc>; [all …]
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/openbmc/qemu/docs/system/arm/ |
H A D | raspi.rst | 8 ARM1176JZF-S core, 512 MiB of RAM 10 Cortex-A7 (4 cores), 1 GiB of RAM 12 Cortex-A53 (4 cores), 512 MiB of RAM 14 Cortex-A53 (4 cores), 1 GiB of RAM 16 Cortex-A72 (4 cores), 2 GiB of RAM 19 ------------------- 21 * ARM1176JZF-S, Cortex-A7, Cortex-A53 or Cortex-A72 CPU 27 * Serial ports (BCM2835 AUX - 16550 based - and PL011) 28 * Random Number Generator (RNG) 41 ---------------
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/openbmc/qemu/include/hw/arm/ |
H A D | bcm2835_peripherals.h | 9 * See the COPYING file in the top-level directory. 20 #include "hw/or-irq.h" 33 #include "hw/usb/hcd-dwc2.h" 40 #define TYPE_BCM_SOC_PERIPHERALS_BASE "bcm-soc-peripherals-base" 43 #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals" 96 BCM2835RngState rng; member
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/openbmc/qemu/tests/qtest/ |
H A D | meson.build | 2 'ahci-test': 150, 3 'aspeed_smc-test': 360, 4 'bios-tables-test' : 910, 5 'cdrom-test' : 610, 6 'device-introspect-test' : 720, 7 'ide-test' : 120, 8 'migration-test' : 480, 9 'npcm7xx_pwm-test': 300, 10 'npcm7xx_watchdog_timer-test': 120, 11 'qmp-cmd-test' : 120, [all …]
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/openbmc/openbmc/poky/documentation/bsp-guide/ |
H A D | bsp.rst | 1 .. SPDX-License-Identifier: CC-BY-SA-2.0-UK 4 Board Support Packages (BSP) --- Developer's Guide 19 Layer using the :ref:`bitbake-layers <bsp-guide/bsp:Creating a new BSP Layer Using the \`\`bitbake-… 28 layers in the Yocto Project use the following well-established naming 31 meta-bsp_root_name 33 The string "meta-" is prepended to the 38 Because the BSP layer naming convention is well-established, it is 40 BSP layer name does not need to start with ``meta-``. 47 :ref:`overview-manual/development-environment:yocto project source repositories` 58 ``meta-raspberrypi`` and ``meta-intel``). Each of these layers is a [all …]
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/openbmc/qemu/hw/misc/ |
H A D | stm32l4x5_rcc.c | 4 * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr> 5 * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr> 7 * SPDX-License-Identifier: GPL-2.0-or-later 10 * See the COPYING file in the top-level directory. 13 * for STM32L4x5 and STM32L4x6 advanced Arm ® -based 32-bit MCUs. 15 * Inspired by the BCM2835 CPRMAN clock manager implementation by Luc Michel. 28 #include "hw/qdev-clock.h" 29 #include "hw/qdev-properties.h" 30 #include "hw/qdev-properties-system.h" 49 Clock *current_source = mux->srcs[mux->src]; in clock_mux_update() [all …]
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/openbmc/linux/drivers/tty/serial/8250/ |
H A D | 8250_port.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Base port operations for 8250/16550-type serial ports 255 * tx_loadsz is set to 63-bytes instead of 64-bytes to implement 256 * workaround of errata A-008006 which states that tx_loadsz should 268 .name = "Palmchip BK-3103", 354 offset = offset << p->regshift; in hub6_serial_in() 355 outb(p->hub6 - 1 + offset, p->iobase); in hub6_serial_in() 356 return inb(p->iobase + 1); in hub6_serial_in() 361 offset = offset << p->regshift; in hub6_serial_out() 362 outb(p->hub6 - 1 + offset, p->iobase); in hub6_serial_out() [all …]
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/openbmc/linux/ |
H A D | MAINTAINERS | 5 ---------- [all...] |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |
/openbmc/ |
D | opengrok1.0.log | 1 2025-01-08 03:00:39.311-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-01-08 03:00:39.421-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |
D | opengrok2.0.log | 1 2025-01-07 03:00:34.968-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-01-07 03:00:35.081-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |