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/openbmc/linux/arch/arm64/boot/dts/realtek/
H A Drtd16xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
17 reserved-memory {
18 #address-cells = <1>;
19 #size-cells = <1>;
32 no-map;
[all …]
H A Drtd129x.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
5 * Copyright (c) 2016-2019 Andreas Färber
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/realtek,rtd1295.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
[all …]
H A Drtd139x.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/realtek,rtd1295.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
34 no-map;
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/openbmc/openbmc/meta-arm/documentation/
H A Dtrusted-services.md1 # The Trusted Services: framework for developing root-of-trust services
3 meta-arm layer includes recipes for [Trusted Services][^1] Secure Partitions and Normal World appli…
4 in `meta-arm/recipes-security/trusted-services`
10 These files are automatically included into optee-os image accordingly to defined MACHINE_FEATURES.
14 To include TS SPs into optee-os image you need to add into MACHINE_FEATURES
18 | ----------------- | --------------- |
19 | Attestation | ts-attesation |
20 | Crypto | ts-crypto |
21 | Firmware Update | ts-fwu
22 | Internal Storage | ts-its |
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/openbmc/linux/arch/arm64/boot/dts/intel/
H A Dkeembay-soc.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a53";
23 enable-method = "psci";
27 compatible = "arm,cortex-a53";
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/openbmc/linux/arch/arm64/boot/dts/amazon/
H A Dalpine-v2.dtsi4 * Antoine Tenart <antoine.tenart@free-electrons.com>
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
35 /dts-v1/;
37 #include <dt-bindings/interrupt-controller/arm-gic.h>
41 compatible = "al,alpine-v2";
42 #address-cells = <2>;
43 #size-cells = <2>;
46 #address-cells = <2>;
47 #size-cells = <0>;
[all …]
H A Dalpine-v3.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "amazon,al-alpine-v3";
14 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a72";
[all …]
/openbmc/linux/arch/arm/boot/dts/realtek/
H A Drtd1195.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 * Copyright (c) 2017-2019 Andreas Färber
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/realtek,rtd1195.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a7";
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/openbmc/u-boot/drivers/mmc/
H A DKconfig5 default ARM || PPC || SANDBOX
31 Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
32 and non-removable (e.g. eMMC chip) devices are supported. These
33 appear as block devices in U-Boot and can support filesystems such
42 Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
43 and non-removable (e.g. eMMC chip) devices are supported. These
44 appear as block devices in U-Boot and can support filesystems such
50 bool "ARM AMBA Multimedia Card Interface and compatible support"
53 This selects the ARM(R) AMBA(R) PrimeCell Multimedia Card
55 If you have an ARM(R) platform with a Multimedia Card slot,
[all …]
/openbmc/linux/drivers/iommu/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-y += amd/ intel/ arm/ iommufd/
3 obj-$(CONFIG_IOMMU_API) += iommu.o
4 obj-$(CONFIG_IOMMU_API) += iommu-traces.o
5 obj-$(CONFIG_IOMMU_API) += iommu-sysfs.o
6 obj-$(CONFIG_IOMMU_DEBUGFS) += iommu-debugfs.o
7 obj-$(CONFIG_IOMMU_DMA) += dma-iommu.o
8 obj-$(CONFIG_IOMMU_IO_PGTABLE) += io-pgtable.o
9 obj-$(CONFIG_IOMMU_IO_PGTABLE_ARMV7S) += io-pgtable-arm-v7s.o
10 obj-$(CONFIG_IOMMU_IO_PGTABLE_LPAE) += io-pgtable-arm.o
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ or MIT)
3 * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-h6-ccu.h>
8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/reset/sun50i-h6-ccu.h>
10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
[all …]
H A Drk3xxx.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
38 dmac1_s: dma-controller@20018000 {
39 compatible = "arm,pl330", "arm,primecell";
43 #dma-cells = <1>;
[all …]
H A Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
11 compatible = "altr,socfpga-stratix10";
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a53", "arm,armv8";
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/openbmc/openbmc/meta-arm/ci/
H A Ddownload-lockfile.py5 server, full name of the meta-arm project, and the refspec that was executed.
8 $ ./download-lockfile.py https://gitlab.com/ rossburton/meta-arm master
10 SPDX-FileCopyrightText: Copyright 2023 Arm Limited and Contributors
11 SPDX-License-Identifier: GPL-2.0-only
16 import io
21 parser.add_argument("project", help="meta-arm project name")
27 artefact = project.artifacts.download(ref_name=args.refspec, job="update-repos")
29 z = zipfile.ZipFile(io.BytesIO(artefact))
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dpl011.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM AMBA Primecell PL011 serial UART
10 - Rob Herring <robh@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: serial.yaml#
16 # Need a custom select here or 'arm,primecell' will match on lots of nodes
22 - arm,pl011
24 - compatible
[all …]
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Dapple.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/apple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple ARM Machine
10 - Hector Martin <marcan@marcan.st>
13 ARM platforms using SoCs designed by Apple Inc., branded "Apple Silicon".
17 - Mac mini (M1, 2020)
18 - MacBook Pro (13-inch, M1, 2020)
19 - MacBook Air (M1, 2020)
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1126.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rv1126-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rockchip,rv1126-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
H A Drk3xxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 interrupt-parent = <&gic>;
33 compatible = "fixed-clock";
34 clock-frequency = <24000000>;
35 #clock-cells = <0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/bitmain/
H A Dbm1880.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/bm1880-clock.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/bitmain,bm1880-reset.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a53";
[all …]
/openbmc/linux/arch/arm/mm/
H A Dpmsa-v8.c2 * Based on linux/arch/arm/pmsa-v7.c
4 * ARM PMSAv8 supporting functions.
78 static struct range __initdata io[MPU_MAX_REGIONS]; variable
120 memblock_remove(reg_start, 0 - reg_start); in pmsav8_adjust_lowmem_bounds()
145 return -ENOENT; in __pmsav8_setup_region()
166 return -EINVAL; in pmsav8_setup_ram()
169 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1); in pmsav8_setup_ram()
182 return -EINVAL; in pmsav8_setup_io()
185 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1); in pmsav8_setup_io()
198 return -EINVAL; in pmsav8_setup_fixed()
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-39x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
33 enable-method = "marvell,armada-390-smp";
37 compatible = "arm,cortex-a9";
[all …]
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr9a06g032.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
30 compatible = "arm,cortex-a7";
33 enable-method = "renesas,r9a06g032-smp";
[all …]
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a100.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-a100-ccu.h>
8 #include <dt-bindings/clock/sun50i-a100-r-ccu.h>
9 #include <dt-bindings/reset/sun50i-a100-ccu.h>
10 #include <dt-bindings/reset/sun50i-a100-r-ccu.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
[all …]
/openbmc/linux/arch/arm64/kernel/
H A Dio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Based on arch/arm/kernel/io.c
5 * Copyright (C) 2012 ARM Ltd.
10 #include <linux/io.h>
13 * Copy data from IO memory space to "real" memory space.
21 count--; in __memcpy_fromio()
28 count -= 8; in __memcpy_fromio()
35 count--; in __memcpy_fromio()
41 * Copy data from "real" memory space to IO memory space.
49 count--; in __memcpy_toio()
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/openbmc/linux/arch/arm/boot/dts/amazon/
H A Dalpine.dtsi27 #include <dt-bindings/interrupt-controller/arm-gic.h>
30 #address-cells = <2>;
31 #size-cells = <2>;
42 #address-cells = <1>;
43 #size-cells = <0>;
44 enable-method = "al,alpine-smp";
47 compatible = "arm,cortex-a15";
50 clock-frequency = <1700000000>;
54 compatible = "arm,cortex-a15";
57 clock-frequency = <1700000000>;
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