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Searched full:apusys_pll (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/arm/mediatek/
H A Dmediatek,mt8195-clock.yaml20 The devices except apusys_pll provide clock gate control in different IP blocks.
21 The apusys_pll provides Plls which generated from SoC 26m for AI Processing Unit.
51 - mediatek,mt8195-apusys_pll
234 apusys_pll: clock-controller@190f3000 {
235 compatible = "mediatek,mt8195-apusys_pll";
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8195-apusys_pll.c99 { .compatible = "mediatek,mt8195-apusys_pll", },
108 .name = "clk-mt8195-apusys_pll",
H A DMakefile131 obj-$(CONFIG_COMMON_CLK_MT8195_APUSYS) += clk-mt8195-apusys_pll.o
/openbmc/linux/include/dt-bindings/clock/
H A Dmt8195-clk.h733 /* APUSYS_PLL */
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi2509 apusys_pll: clock-controller@190f3000 { label
2510 compatible = "mediatek,mt8195-apusys_pll";
/openbmc/linux/
H A Dopengrok2.0.log[all...]