/openbmc/linux/Documentation/devicetree/bindings/power/supply/ |
H A D | maxim,max17040.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sebastian Reichel <sre@kernel.org> 13 - $ref: power-supply.yaml# 18 - maxim,max17040 19 - maxim,max17041 20 - maxim,max17043 21 - maxim,max17044 22 - maxim,max17048 [all …]
|
/openbmc/linux/drivers/power/supply/ |
H A D | max17040_battery.c | 1 // SPDX-License-Identifier: GPL-2.0 4 // fuel-gauge systems for lithium-ion (Li+) batteries 147 int soc; member 148 /* Low alert threshold from 32% to 1% of the State of Charge */ 158 return regmap_write(chip->regmap, MAX17040_CMD, chip->data.reset_val); in max17040_reset() 161 static int max17040_set_low_soc_alert(struct max17040_chip *chip, u32 level) in max17040_set_low_soc_alert() argument 163 level = 32 - level * (chip->quirk_double_soc ? 2 : 1); in max17040_set_low_soc_alert() 164 return regmap_update_bits(chip->regmap, MAX17040_CONFIG, in max17040_set_low_soc_alert() 165 MAX17040_ATHD_MASK, level); in max17040_set_low_soc_alert() 170 return regmap_update_bits(chip->regmap, MAX17040_CONFIG, in max17040_set_soc_alert() [all …]
|
/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5422-odroidxu3-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source 12 #include <dt-bindings/input/input.h> 13 #include "exynos5422-odroid-core.dtsi" 20 gpio-keys { 21 compatible = "gpio-keys"; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&power_key>; 25 power-key { 30 * output on ONOB pin (active low). ONOB PMIC pin is [all …]
|
/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2080A family SoC. 6 * Copyright 2017-2020 NXP 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 32 #address-cells = <1>; [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/ |
H A D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/trivial-devices.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 27 spi-max-frequency: true 31 - enum: 33 - acbel,fsg032 34 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin 35 - ad,ad7414 [all …]
|
/openbmc/linux/Documentation/spi/ |
H A D | spi-summary.rst | 5 02-Feb-2012 8 ------------ 17 clocking modes through which data is exchanged; mode-0 and mode-3 are most 25 low signals, labeled nCSx for slave 'x' (e.g. nCS0). Some devices have 28 Unlike serial busses like USB or SMBus, even low level protocols for 32 - SPI may be used for request/response style device protocols, as with 35 - It may also be used to stream data in either direction (half duplex), 38 - Some devices may use eight bit words. Others may use different word 39 lengths, such as streams of 12-bit or 20-bit digital samples. 41 - Words are usually sent with their most significant bit (MSB) first, [all …]
|
/openbmc/pldm/oem/ampere/event/ |
H A D | oem_event_manager.cpp | 12 #include <systemd/sd-journal.h> 14 #include <phosphor-logging/lg2.hpp> 59 " progress started", " in-progress", " progress completed"}; 69 In Ampere systems, BMC only directly communicates with MCTP/PLDM SoC 121 {ddr_status::NO_SYSTEM_LEVEL_ERROR, "has no system level error"}, 141 {dimm_status::PMIC_TEMP_ALERT, "has PMIC temperature alert"}}; 153 "(PHY write level failure - see syndrome 1)"}, 156 {phy_syndrome::PHY_READ_LEVEL_FAILURE, "(PHY read level failure)"}, 174 A map between DIMM training failure type and a pair of <logging strings - 188 A map between log level and the registry used for Redfish SEL log [all …]
|
/openbmc/linux/arch/arm/boot/dts/qcom/ |
H A D | qcom-msm8974-lge-nexus5-hammerhead.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "qcom-msm8974.dtsi" 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/leds/common.h> 7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 12 chassis-type = "handset"; 20 stdout-path = "serial0:115200n8"; 23 gpio-keys { 24 compatible = "gpio-keys"; 26 pinctrl-names = "default"; [all …]
|
/openbmc/linux/Documentation/firmware-guide/acpi/ |
H A D | enumeration.rst | 1 .. SPDX-License-Identifier: GPL-2.0 12 SoC/Chipset to appear only in ACPI namespace. These are typically devices 13 that are accessed through memory-mapped registers. 15 In order to support this and re-use the existing drivers as much as 18 - Devices that have no bus connector resource are represented as 21 - Devices behind real busses where there is a connector resource 34 This means that when ACPI_HANDLE(dev) returns non-NULL the device was 36 device-specific configuration. There is an example of this below. 43 for the device and add supported ACPI IDs. If this same IP-block is used on 44 some other non-ACPI platform, the driver might work out of the box or needs [all …]
|
/openbmc/linux/drivers/net/wireless/ath/ath5k/ |
H A D | ath5k.h | 2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org> 3 * Copyright (c) 2006-2007 Nick Kossifidis <mickflemm@gmail.com> 62 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV7 0x0057 /* AR5312 WMAC (AP30-040) */ 63 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV8 0x0058 /* AR5312 WMAC (AP43-030) */ 70 #define PCI_DEVICE_ID_ATHEROS_AR2413 0x001a /* AR2413 (Griffin-lite) */ 72 #define PCI_DEVICE_ID_ATHEROS_AR5424 0x001c /* AR5424 (Condor PCI-E) */ 84 _ath5k_printk(const struct ath5k_hw *ah, const char *level, 189 #define AR5K_TUNE_NOISE_FLOOR -72 190 #define AR5K_TUNE_CCA_MAX_GOOD_VALUE -95 274 * enum ath5k_version - MAC Chips [all …]
|
/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | ste-dbx5x0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/clock/ste-db8500-clkout.h> 9 #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h> 10 #include <dt-bindings/mfd/dbx500-prcmu.h> 11 #include <dt-bindings/arm/ux500_pm_domains.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/thermal/thermal.h> 16 #address-cells = <1>; [all …]
|
/openbmc/linux/drivers/soundwire/ |
H A D | cadence_master.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // Copyright(c) 2015-17 Intel Corporation. 20 #include <sound/soc.h> 32 #define CDNS_IP_MCP_CONFIG 0x0 /* IP offset added at run-time */ 49 #define CDNS_IP_MCP_CONTROL 0x4 /* IP offset added at run-time */ 57 #define CDNS_IP_MCP_CMDCTRL 0x8 /* IP offset added at run-time */ 132 #define CDNS_IP_MCP_CMD_BASE 0x80 /* IP offset added at run-time */ 133 #define CDNS_IP_MCP_RESP_BASE 0x80 /* IP offset added at run-time */ 205 return readl(cdns->registers + offset); in cdns_readl() 210 writel(value, cdns->registers + offset); in cdns_writel() [all …]
|
/openbmc/linux/ |
H A D | CREDITS | 1 This is at least a partial credits-file of people that have 4 scripts. The fields are: name (N), email (E), web-address 6 snail-mail address (S). 10 ---------- 51 D: in-kernel DRM Maintainer 71 E: tim_alpaerts@toyota-motor-europe.com 75 S: B-2610 Wilrijk-Antwerpen 80 W: http://www-stu.christs.cam.ac.uk/~aia21/ 101 D: Maintainer of ide-cd and Uniform CD-ROM driver, 102 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update. [all …]
|
/openbmc/linux/drivers/net/ethernet/sfc/ |
H A D | mcdi_pcol.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 4 * Copyright 2009-2018 Solarflare Communications Inc. 5 * Copyright 2019-2020 Xilinx Inc. 13 /* Power-on reset state */ 35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */ 38 /* The rest of these are firmware-defined */ 46 /* Values to be written to the per-port status dword in shared 71 * | | \--- Response 72 * | \------- Error 73 * \------------------------------ Resync (always set) [all …]
|
/openbmc/linux/drivers/gpu/drm/etnaviv/ |
H A D | etnaviv_gpu.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2015-2018 Etnaviv Project 9 #include <linux/dma-fence.h> 10 #include <linux/dma-mapping.h> 31 { .name = "etnaviv-gpu,2d" }, 41 struct etnaviv_drm_private *priv = gpu->drm->dev_private; in etnaviv_gpu_get_param() 45 *value = gpu->identity.model; in etnaviv_gpu_get_param() 49 *value = gpu->identity.revision; in etnaviv_gpu_get_param() 53 *value = gpu->identity.features; in etnaviv_gpu_get_param() 57 *value = gpu->identity.minor_features0; in etnaviv_gpu_get_param() [all …]
|
/openbmc/ |
D | opengrok1.0.log | 1 2025-03-24 03:00:46.525-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-03-24 03:00:46.643-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |
D | opengrok2.0.log | 1 2025-03-23 03:00:33.620-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-03-23 03:00:33.720-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |