Home
last modified time | relevance | path

Searched full:writes (Results 1 – 25 of 830) sorted by relevance

12345678910>>...34

/openbmc/qemu/contrib/plugins/
H A Dhotpages.c45 uint64_t writes; member
58 r = (ea->reads + ea->writes) > (eb->reads + eb->writes) ? -1 : 1; in cmp_access_count()
64 r = ea->writes > eb->writes ? -1 : 1; in cmp_access_count()
78 g_autoptr(GString) report = g_string_new("Addr, RCPUs, Reads, WCPUs, Writes\n"); in plugin_exit()
95 rec->cpu_write, rec->writes); in plugin_exit()
141 count->writes++; in vcpu_haddr()
177 } else if (g_strcmp0(tokens[1], "writes") == 0) { in qemu_plugin_install()
H A Dhwprofile.c29 uint64_t writes; member
78 return ea->totals.reads + ea->totals.writes > in sort_cmp()
79 eb->totals.reads + eb->totals.writes ? -1 : 1; in sort_cmp()
97 rec->cpu_write, rec->writes); in fmt_iocount_record()
120 g_string_append_printf(report, ", WCPUs, Writes"); in plugin_exit()
189 count->writes++; in inc_count()
/openbmc/qemu/tests/tcg/multiarch/system/
H A Dvalidate-memory-counts.py49 Region Base, Reads, Writes, Seen all
75 writes = int(parts[2])
79 total_writes += writes
124 print("Fail: The memory reads and writes count does not match.")
126 print(f"Expected Writes: {exp_writes}, Actual Writes: {pwrites}")
/openbmc/qemu/target/hexagon/
H A Dattribs_def.h.inc103 DEF_ATTRIB(IMPLICIT_WRITES_LR, "Writes the link register", "", "UREG.LR")
104 DEF_ATTRIB(IMPLICIT_WRITES_SP, "Writes the stack pointer", "", "UREG.SP")
105 DEF_ATTRIB(IMPLICIT_WRITES_FP, "Writes the frame pointer", "", "UREG.FP")
106 DEF_ATTRIB(IMPLICIT_WRITES_LC0, "Writes loop count for loop 0", "", "UREG.LC0")
107 DEF_ATTRIB(IMPLICIT_WRITES_LC1, "Writes loop count for loop 1", "", "UREG.LC1")
108 DEF_ATTRIB(IMPLICIT_WRITES_SA0, "Writes start addr for loop 0", "", "UREG.SA0")
109 DEF_ATTRIB(IMPLICIT_WRITES_SA1, "Writes start addr for loop 1", "", "UREG.SA1")
110 DEF_ATTRIB(IMPLICIT_WRITES_P0, "Writes Predicate 0", "", "UREG.P0")
111 DEF_ATTRIB(IMPLICIT_WRITES_P1, "Writes Predicate 1", "", "UREG.P1")
112 DEF_ATTRIB(IMPLICIT_WRITES_P2, "Writes Predicate 1", "", "UREG.P2")
/openbmc/qemu/scripts/oss-fuzz/
H A Dminimize_qtest_trace.py101 writes = []
104 writes.append(newtrace[l])
114 length = int(writes[0].split()[2], 16)
116 if length != int(writes[j].split()[2], 16):
119 step = int(writes[0].split()[1], 16) - int(writes[1].split()[1], 16)
121 if step != int(writes[j].split()[1], 16) - \
122 int(writes[j+1].split()[1], 16):
125 return (int(writes[0].split()[1], 16)+step, length)
155 # BE options. We do this, so we can "trim" the writes in (3)
180 # is to prune unnecessary bytes from long writes, while accommodating
[all …]
/openbmc/u-boot/arch/x86/include/asm/
H A Dmpspec.h279 * This writes the MP floating table, and points MP configuration table
300 * This writes a processor entry to the configuration table.
309 * This writes a bus entry to the configuration table.
320 * This writes an I/O APIC entry to the configuration table.
332 * This writes an I/O interrupt assignment entry to the configuration table.
348 * This writes a PCI interrupt assignment entry to the configuration table.
364 * This writes a local interrupt assignment entry to the configuration table.
381 * This writes a system address space entry to the configuration table.
399 * This writes a bus hierarchy descriptor entry to the configuration table.
412 * This writes a compatibility bus address space modifier entry to the
[all …]
H A Dtables.h49 * This writes x86 configuration tables, including PIRQ routing table,
58 * This writes PIRQ routing table at a given address.
/openbmc/u-boot/doc/
H A DI2C_Edge_Conditions10 3) The I2C writes the device address.
15 2) The I2C controller writes the device address.
16 3) The I2C controller writes the offset.
H A DREADME.ubispl106 * FLASH chip to do subpage writes.
108 * If the flash chip supports subpage writes, then the VID
112 * If the flash chip does not support subpage writes then the
/openbmc/libmctp/docs/bindings/
H A Dvendor-ibm-astlpc.md101 - A window of the LPC FW address space, where reads and writes are forwarded to
107 - The BMC will perform writes by writing to the memory backing the LPC window
108 - The host will perform writes by writing to the LPC bus, at predefined
148 writes to the KCS status register but hardware implementations are not required
149 to do so. Comparatively, writes to the data registers must set the corresponding
316 | 1 | The host writes a command value to IDR |
329 | 1 | The BMC writes a command value to ODR |
342 | 1 | The BMC writes the status value to the status register |
343 | 2 | The BMC writes the dummy command to ODR |
364 1. The Tx side writes the packet to its Tx buffer
[all …]
/openbmc/qemu/docs/specs/
H A Dfw_cfg.rst32 of 1 means the item's data can be overwritten by writes to the data
37 As of QEMU v2.4, writes to the fw_cfg data register are no
41 As of QEMU v2.9, writes are reinstated, but only through the DMA
56 * Read/Write (writes ignored as of QEMU v2.4, but see the DMA interface)
78 value of 0x00, and all writes will be ignored.
190 64-bit addresses can be triggered with one 64-bit write or two 32-bit writes,
225 with the current selector (i.e., the item cannot be resized). Truncated writes
226 are dropped entirely. Writes to read-only items are also rejected. All of these
/openbmc/qemu/include/io/
H A Dchannel-null.h35 * that discards all writes and returns EOF for all reads.
47 * Create a new IO channel object that discards all writes
/openbmc/qemu/docs/
H A Dnvdimm.txt39 "share=on/off" controls the visibility of guest writes. If
40 "share=on", then guest writes will be applied to the backend
42 "share=on", then above writes will be visible to it as well. If
43 "share=off", then guest writes won't be applied to the backend
55 persistent writes. Linux guest drivers set the device to read-only when this
191 accept persistent writes. In result, for example, the guest Linux
247 will take necessary operations to guarantee the persistence of its own writes
/openbmc/qemu/hw/vfio/
H A Dpci-quirks.h22 * pass reads and writes through to hardware until a value matching the
57 * through a region within a BAR. When enabled, reads and writes are
/openbmc/openpower-proc-control/
H A Dcfam_access.hpp19 * @brief Writes a CFAM (Common FRU Access Macro) register in a P9.
43 * @brief Writes a CFAM (Common FRU Access Macro) register in a P9
/openbmc/qemu/tests/qemu-iotests/tests/
H A Dimage-fleecing.out59 --- Confirming writes ---
129 --- Confirming writes ---
201 --- Confirming writes ---
285 --- Confirming writes ---
348 --- Confirming writes ---
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/unixodbc/files/
H A DCVE-2024-1013.patch6 These result in out-of-bounds stack writes on 64-bit architectures
7 (caller has 4 bytes, callee writes 8 bytes), and seem to have gone
/openbmc/phosphor-hwmon/
H A Dfan_speed.hpp15 * @details Derived FanSpeedObject type that writes the target value to sysfs
52 * @brief Writes the pwm_enable sysfs entry if the
/openbmc/estoraged/include/
H A Dzero.hpp24 /** @brief writes zero to the drive
31 /** @brief writes zero to the drive using default parameters,
H A Dpattern.hpp26 /** @brief writes an incompressible random pattern to the drive, using
36 /** @brief writes an incompressible random pattern to the drive
/openbmc/qemu/tests/qtest/
H A Dlibqtest-single.h173 * Writes an 8-bit value to guest memory.
185 * Writes a 16-bit value to guest memory.
197 * Writes a 32-bit value to guest memory.
209 * Writes a 64-bit value to guest memory.
/openbmc/qemu/docs/interop/
H A Dbitmaps.rst12 Dirty Bitmaps are in-memory objects that track writes to block devices. They
48 explicitly added in order to begin tracking writes.
54 That is to say: It's likely most useful to track the guest's writes to disk,
72 writes bitmap data to disk upon close. If persistence is not required for a
120 - ``recording``: This bitmap is recording writes.
142 #. ``Disabled``: This bitmap is not recording new writes.
146 #. ``Active``: This bitmap is recording new writes.
195 Creates a new bitmap that tracks writes to the specified node. granularity,
300 "Enables" a bitmap, setting the ``recording`` bit to true, causing writes to
330 writes to begin being ignored. ``+busy`` bitmaps cannot be disabled.
[all …]
/openbmc/u-boot/drivers/mtd/
H A DKconfig47 bool "Enable buffered writes to flash"
50 Use buffered writes to flash.
/openbmc/hiomapd/vpnor/
H A DREADME.md14 behaviour around writes from the host. It is likely the scheme will prevent
53 future writes are expected to succeed, but in both cases we define them as
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-dbs/influxdb/influxdb/
H A Dinfluxdb.conf70 # Validates incoming writes to ensure keys only have valid unicode characters.
77 # reach before it starts rejecting writes.
90 # a new TSM file if the shard hasn't received writes or deletes
120 # The maximum series allowed per database before writes are dropped. This limit can prevent
125 # The maximum number of tag values per tag that are allowed before writes are dropped. This limit
332 # The maximum number of writes processed concurrently.
336 # The maximum number of writes queued for processing.
378 # The default timeout for HTTP writes to subscribers.
391 # The number of in-flight writes buffered in the write channel.

12345678910>>...34