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/openbmc/linux/drivers/net/ethernet/mediatek/
H A Dmtk_wed_wo.c21 mtk_wed_mmio_r32(struct mtk_wed_wo *wo, u32 reg) in mtk_wed_mmio_r32() argument
25 if (regmap_read(wo->mmio.regs, reg, &val)) in mtk_wed_mmio_r32()
32 mtk_wed_mmio_w32(struct mtk_wed_wo *wo, u32 reg, u32 val) in mtk_wed_mmio_w32() argument
34 regmap_write(wo->mmio.regs, reg, val); in mtk_wed_mmio_w32()
38 mtk_wed_wo_get_isr(struct mtk_wed_wo *wo) in mtk_wed_wo_get_isr() argument
40 u32 val = mtk_wed_mmio_r32(wo, MTK_WED_WO_CCIF_RCHNUM); in mtk_wed_wo_get_isr()
46 mtk_wed_wo_set_isr(struct mtk_wed_wo *wo, u32 mask) in mtk_wed_wo_set_isr() argument
48 mtk_wed_mmio_w32(wo, MTK_WED_WO_CCIF_IRQ0_MASK, mask); in mtk_wed_wo_set_isr()
52 mtk_wed_wo_set_ack(struct mtk_wed_wo *wo, u32 mask) in mtk_wed_wo_set_ack() argument
54 mtk_wed_mmio_w32(wo, MTK_WED_WO_CCIF_ACK, mask); in mtk_wed_wo_set_ack()
[all …]
H A Dmtk_wed_mcu.c19 static u32 wo_r32(struct mtk_wed_wo *wo, u32 reg) in wo_r32() argument
21 return readl(wo->boot.addr + reg); in wo_r32()
24 static void wo_w32(struct mtk_wed_wo *wo, u32 reg, u32 val) in wo_w32() argument
26 writel(val, wo->boot.addr + reg); in wo_w32()
48 mtk_wed_mcu_get_response(struct mtk_wed_wo *wo, unsigned long expires) in mtk_wed_mcu_get_response() argument
53 wait_event_timeout(wo->mcu.wait, !skb_queue_empty(&wo->mcu.res_q), in mtk_wed_mcu_get_response()
55 return skb_dequeue(&wo->mcu.res_q); in mtk_wed_mcu_get_response()
58 void mtk_wed_mcu_rx_event(struct mtk_wed_wo *wo, struct sk_buff *skb) in mtk_wed_mcu_rx_event() argument
60 skb_queue_tail(&wo->mcu.res_q, skb); in mtk_wed_mcu_rx_event()
61 wake_up(&wo->mcu.wait); in mtk_wed_mcu_rx_event()
[all …]
H A Dmtk_wed_wo.h256 mtk_wed_mcu_check_msg(struct mtk_wed_wo *wo, struct sk_buff *skb) in mtk_wed_mcu_check_msg() argument
269 void mtk_wed_mcu_rx_event(struct mtk_wed_wo *wo, struct sk_buff *skb);
270 void mtk_wed_mcu_rx_unsolicited_event(struct mtk_wed_wo *wo,
272 int mtk_wed_mcu_send_msg(struct mtk_wed_wo *wo, int id, int cmd,
276 int mtk_wed_mcu_init(struct mtk_wed_wo *wo);
/openbmc/linux/Documentation/devicetree/bindings/arm/mediatek/
H A Dmediatek,mt7622-wed.yaml43 - const: wo-emi
44 - const: wo-ilm
45 - const: wo-dlm
46 - const: wo-data
47 - const: wo-boot
49 mediatek,wo-ccif:
51 description: mediatek wed-wo controller interface.
63 mediatek,wo-ccif: false
100 memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
101 "wo-data", "wo-boot";
[all …]
/openbmc/linux/kernel/
H A Dexit.c1059 static int eligible_pid(struct wait_opts *wo, struct task_struct *p) in eligible_pid() argument
1061 return wo->wo_type == PIDTYPE_MAX || in eligible_pid()
1062 task_pid_type(p, wo->wo_type) == wo->wo_pid; in eligible_pid()
1066 eligible_child(struct wait_opts *wo, bool ptrace, struct task_struct *p) in eligible_child() argument
1068 if (!eligible_pid(wo, p)) in eligible_child()
1075 if (ptrace || (wo->wo_flags & __WALL)) in eligible_child()
1086 if ((p->exit_signal != SIGCHLD) ^ !!(wo->wo_flags & __WCLONE)) in eligible_child()
1098 static int wait_task_zombie(struct wait_opts *wo, struct task_struct *p) in wait_task_zombie() argument
1105 if (!likely(wo->wo_flags & WEXITED)) in wait_task_zombie()
1108 if (unlikely(wo->wo_flags & WNOWAIT)) { in wait_task_zombie()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmediatek,mt7986-wo-ccif.yaml4 $id: http://devicetree.org/schemas/soc/mediatek/mediatek,mt7986-wo-ccif.yaml#
7 title: MediaTek Wireless Ethernet Dispatch (WED) WO controller interface for MT7986
14 The MediaTek wo-ccif provides a configuration interface for WED WO
22 - mediatek,mt7986-wo-ccif
47 compatible = "mediatek,mt7986-wo-ccif", "syscon";
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi82 wo_emi0: wo-emi@4fd00000 {
87 wo_emi1: wo-emi@4fd40000 {
92 wo_ilm0: wo-ilm@151e0000 {
97 wo_ilm1: wo-ilm@151f0000 {
102 wo_data: wo-data@4fd80000 {
107 wo_dlm0: wo-dlm@151e8000 {
112 wo_dlm1: wo-dlm@151f8000 {
117 wo_boot: wo-boot@15194000 {
506 memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
507 "wo-data", "wo-boot";
[all …]
/openbmc/linux/include/linux/mfd/
H A Dkhadas-mcu.h65 #define KHADAS_MCU_PWR_OFF_CMD_REG 0x80 /* WO */
66 #define KHADAS_MCU_PASSWD_START_REG 0x81 /* WO */
67 #define KHADAS_MCU_CHECK_VEN_PASSWD_REG 0x82 /* WO */
68 #define KHADAS_MCU_CHECK_USER_PASSWD_REG 0x83 /* WO */
70 #define KHADAS_MCU_WOL_INIT_START_REG 0x87 /* WO */
71 #define KHADAS_MCU_CMD_FAN_STATUS_CTRL_REG 0x88 /* WO */
/openbmc/linux/tools/testing/selftests/powerpc/ptrace/
H A Dptrace-hwbreak.c129 /* PTRACE_SET_DEBUGREG, WO test */ in test_workload()
148 /* PPC_PTRACE_SETHWDEBUG, MODE_EXACT, WO test */ in test_workload()
163 /* PPC_PTRACE_SETHWDEBUG, MODE_RANGE, DW ALIGNED, WO test */ in test_workload()
175 /* PPC_PTRACE_SETHWDEBUG, MODE_RANGE, DW UNALIGNED, WO test */ in test_workload()
199 /* PPC_PTRACE_SETHWDEBUG 2, MODE_RANGE, DW ALIGNED, WO test */ in test_workload()
205 /* PPC_PTRACE_SETHWDEBUG 2, MODE_RANGE, DAWR Overlap, WO test */ in test_workload()
283 /* PTRACE_SET_DEBUGREG, WO test*/ in test_set_debugreg()
290 check_success(child_pid, name, "WO", wp_addr, len); in test_set_debugreg()
359 /* PPC_PTRACE_SETHWDEBUG, MODE_EXACT, WO test */ in test_sethwdebug_exact()
363 check_success(child_pid, name, "WO", wp_addr, len); in test_sethwdebug_exact()
[all …]
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_dbu.h16 u32 cr; /* Control Register WO */
18 u32 ier; /* Interrupt Enable Register WO */
19 u32 idr; /* Interrupt Disable Register WO */
23 u32 thr; /* Transmit Holding Register WO */
/openbmc/linux/drivers/gpu/drm/panfrost/
H A Dpanfrost_regs.h54 #define GPU_PWR_KEY 0x50 /* (WO) Power manager key register */
115 #define SHADER_PWRON_LO 0x180 /* (WO) Shader core power on bitmap, low word */
116 #define SHADER_PWRON_HI 0x184 /* (WO) Shader core power on bitmap, high word */
118 #define TILER_PWRON_LO 0x190 /* (WO) Tiler core power on bitmap, low word */
119 #define TILER_PWRON_HI 0x194 /* (WO) Tiler core power on bitmap, high word */
121 #define L2_PWRON_LO 0x1A0 /* (WO) Level 2 cache power on bitmap, low word */
122 #define L2_PWRON_HI 0x1A4 /* (WO) Level 2 cache power on bitmap, high word */
128 #define SHADER_PWROFF_LO 0x1C0 /* (WO) Shader core power off bitmap, low word */
129 #define SHADER_PWROFF_HI 0x1C4 /* (WO) Shader core power off bitmap, high word */
131 #define TILER_PWROFF_LO 0x1D0 /* (WO) Tiler core power off bitmap, low word */
[all …]
/openbmc/linux/drivers/comedi/drivers/
H A Dni_atmio16d.c46 #define COM_REG_1 0x00 /* wo 16 */
48 #define COM_REG_2 0x02 /* wo 16 */
50 #define START_CONVERT_REG 0x08 /* wo 16 */
51 #define START_DAQ_REG 0x0A /* wo 16 */
52 #define AD_CLEAR_REG 0x0C /* wo 16 */
53 #define EXT_STROBE_REG 0x0E /* wo 16 */
55 #define DAC0_REG 0x10 /* wo 16 */
56 #define DAC1_REG 0x12 /* wo 16 */
57 #define INT2CLR_REG 0x14 /* wo 16 */
59 #define MUX_CNTR_REG 0x04 /* wo 16 */
[all …]
H A Dni_daq_700.c47 #define DIO_W 0x04 /* WO 8bit */
49 #define CMD_R1 0x00 /* WO 8bit */
55 #define ADCLEAR_R 0x01 /* WO 8bit */
60 #define TIC_R 0x06 /* WO 8bit */
/openbmc/linux/arch/sparc/include/uapi/asm/
H A Dasi.h38 /* wo = Write Only, rw = Read Write; */
63 #define ASI_M_FLUSH_PAGE 0x10 /* Flush I&D Cache Line (page); wo, ss */
64 #define ASI_M_FLUSH_SEG 0x11 /* Flush I&D Cache Line (seg); wo, ss */
65 #define ASI_M_FLUSH_REGION 0x12 /* Flush I&D Cache Line (region); wo, ss */
66 #define ASI_M_FLUSH_CTX 0x13 /* Flush I&D Cache Line (context); wo, ss */
67 #define ASI_M_FLUSH_USER 0x14 /* Flush I&D Cache Line (user); wo, ss */
73 #define ASI_M_IFLUSH_PAGE 0x18 /* Flush I Cache Line (page); wo, ss */
74 #define ASI_M_IFLUSH_SEG 0x19 /* Flush I Cache Line (seg); wo, ss */
75 #define ASI_M_IFLUSH_REGION 0x1A /* Flush I Cache Line (region); wo, ss */
76 #define ASI_M_IFLUSH_CTX 0x1B /* Flush I Cache Line (context); wo, ss */
[all …]
/openbmc/qemu/target/sparc/
H A Dasi.h37 /* wo = Write Only, rw = Read Write; */
62 #define ASI_M_FLUSH_PAGE 0x10 /* Flush I&D Cache Line (page); wo, ss */
63 #define ASI_M_FLUSH_SEG 0x11 /* Flush I&D Cache Line (seg); wo, ss */
64 #define ASI_M_FLUSH_REGION 0x12 /* Flush I&D Cache Line (region); wo, ss */
65 #define ASI_M_FLUSH_CTX 0x13 /* Flush I&D Cache Line (context); wo, ss */
66 #define ASI_M_FLUSH_USER 0x14 /* Flush I&D Cache Line (user); wo, ss */
72 #define ASI_M_IFLUSH_PAGE 0x18 /* Flush I Cache Line (page); wo, ss */
73 #define ASI_M_IFLUSH_SEG 0x19 /* Flush I Cache Line (seg); wo, ss */
74 #define ASI_M_IFLUSH_REGION 0x1A /* Flush I Cache Line (region); wo, ss */
75 #define ASI_M_IFLUSH_CTX 0x1B /* Flush I Cache Line (context); wo, ss */
[all …]
/openbmc/linux/drivers/scsi/
H A DNCR5380.h70 #define OUTPUT_DATA_REG 0 /* wo DATA lines on SCSI bus */
76 #define ICR_TRI_STATE 0x40 /* wo Set to tri-state drivers */
78 #define ICR_DIFF_ENABLE 0x20 /* wo Set to enable diff. drivers */
129 #define SELECT_ENABLE_REG 4 /* wo */
142 #define START_DMA_SEND_REG 5 /* wo */
151 #define START_DMA_TARGET_RECEIVE_REG 6 /* wo */
157 #define START_DMA_INITIATOR_RECEIVE_REG 7 /* wo */
160 #define CSR_RESET 0x80 /* wo Resets 53c400 */
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-class-pktcdvd15 add (WO) Write a block device id (major:minor) to
19 remove (WO) Write the pktcdvd device id (major:minor)
35 uevent: (WO) To send a uevent
58 reset: (WO) Write any value to it to reset
H A Dsysfs-bus-rbd6 (WO) Add rbd block device.
24 (WO) Remove rbd block device.
43 (WO) Available only if rbd module is inserted with single_major
57 (WO) Available only if rbd module is inserted with single_major
103 refresh (WO) Writing to this file will reread the image
H A Ddebugfs-cxl6 (WO) When a Device Physical Address (DPA) is written to this
27 (WO) When a Device Physical Address (DPA) is written to this
H A Dsysfs-class-hwmon120 WO
126 WO
538 WO
544 WO
639 WO
645 WO
773 WO
/openbmc/linux/drivers/media/pci/cx88/
H A Dcx88-reg.h202 #define MO_VIDY_GPCNTRL 0x31C030 // {2}WO Video Y general purpose control
203 #define MO_VIDU_GPCNTRL 0x31C034 // {2}WO Video U general purpose control
204 #define MO_VIDV_GPCNTRL 0x31C038 // {2}WO Video V general purpose control
205 #define MO_VBI_GPCNTRL 0x31C03C // {2}WO VBI general purpose counter
219 #define MO_AUDD_GPCNTRL 0x32C030 // {2}WO Audio down general purpose control
220 #define MO_AUDU_GPCNTRL 0x32C034 // {2}WO Audio up general purpose control
221 #define MO_AUDR_GPCNTRL 0x32C038 // {2}WO Audio RDS general purpose control
435 #define MO_TS_GPCNTRL 0x33C030 // {2}WO TS general purpose control
455 #define MO_VIPD_GPCNTRL 0x34C030 // {2}WO VIP down general purpose control
456 #define MO_VIPU_GPCNTRL 0x34C034 // {2}WO VIP up general purpose control
[all …]
/openbmc/qemu/include/hw/ssi/
H A Dibex_spi_host.h43 #define IBEX_SPI_HOST_INTR_TEST (0x08 / 4) /* wo */
44 #define IBEX_SPI_HOST_ALERT_TEST (0x0c / 4) /* wo */
49 #define IBEX_SPI_HOST_COMMAND (0x20 / 4) /* wo */
/openbmc/linux/drivers/media/usb/dvb-usb/
H A Ddibusb-common.c141 int ret, wo, len; in dibusb_i2c_msg() local
144 wo = (rbuf == NULL || rlen == 0); in dibusb_i2c_msg()
146 len = 2 + wlen + (wo ? 0 : 2); in dibusb_i2c_msg()
158 sndbuf[0] = wo ? DIBUSB_REQ_I2C_WRITE : DIBUSB_REQ_I2C_READ; in dibusb_i2c_msg()
159 sndbuf[1] = (addr << 1) | (wo ? 0 : 1); in dibusb_i2c_msg()
163 if (!wo) { in dibusb_i2c_msg()
/openbmc/linux/Documentation/admin-guide/mm/
H A Dcma_debugfs.rst19 - [WO] alloc: Allocate N pages from that CMA area. For example::
25 - [WO] free: Free N pages from that CMA area, similar to the above.
/openbmc/linux/drivers/hwtracing/coresight/
H A Dcoresight-cti.h41 #define ITCHINACK 0xEDC /* WO CTI CSSoc 400 only*/
42 #define ITTRIGINACK 0xEE0 /* WO CTI CSSoc 400 only*/
43 #define ITCHOUT 0xEE4 /* WO RW-600 */
44 #define ITTRIGOUT 0xEE8 /* WO RW-600 */

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