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/openbmc/u-boot/arch/arm/include/asm/arch-imx8/sci/
H A Drpc.h11 #define SC_RPC_VERSION 1U
13 #define SC_RPC_MAX_MSG 8U
20 #define RPC_I32(MSG, IDX) ((MSG)->DATA.i32[(IDX) / 4U])
21 #define RPC_I16(MSG, IDX) ((MSG)->DATA.i16[(IDX) / 2U])
23 #define RPC_U32(MSG, IDX) ((MSG)->DATA.u32[(IDX) / 4U])
24 #define RPC_U16(MSG, IDX) ((MSG)->DATA.u16[(IDX) / 2U])
27 #define SC_RPC_SVC_UNKNOWN 0U
28 #define SC_RPC_SVC_RETURN 1U
29 #define SC_RPC_SVC_PM 2U
30 #define SC_RPC_SVC_RM 3U
[all …]
H A Dtypes.h20 #define SC_32KHZ 32768U /* 32KHz */
21 #define SC_10MHZ 10000000U /* 10MHz */
22 #define SC_20MHZ 20000000U /* 20MHz */
23 #define SC_25MHZ 25000000U /* 25MHz */
24 #define SC_27MHZ 27000000U /* 27MHz */
25 #define SC_40MHZ 40000000U /* 40MHz */
26 #define SC_45MHZ 45000000U /* 45MHz */
27 #define SC_50MHZ 50000000U /* 50MHz */
28 #define SC_60MHZ 60000000U /* 60MHz */
29 #define SC_66MHZ 66666666U /* 66MHz */
[all …]
/openbmc/qemu/ui/
H A Dvnc_keysym.h59 { "U", 0x055},
91 { "u", 0x075},
355 {"abovedot", 0x01ff}, /* U+02D9 DOT ABOVE */
356 {"amacron", 0x03e0}, /* U+0101 LATIN SMALL LETTER A WITH MACRON */
357 {"Amacron", 0x03c0}, /* U+0100 LATIN CAPITAL LETTER A WITH MACRON */
358 {"Arabic_ain", 0x05d9}, /* U+0639 ARABIC LETTER AIN */
359 {"Arabic_alef", 0x05c7}, /* U+0627 ARABIC LETTER ALEF */
360 {"Arabic_alefmaksura", 0x05e9}, /* U+0649 ARABIC LETTER ALEF MAKSURA */
361 {"Arabic_beh", 0x05c8}, /* U+0628 ARABIC LETTER BEH */
362 {"Arabic_comma", 0x05ac}, /* U+060C ARABIC COMMA */
[all …]
/openbmc/qemu/hw/ufs/
H A Dufs.c46 static inline uint64_t ufs_mcq_reg_addr(UfsHc *u, int qid) in ufs_mcq_reg_addr() argument
52 static inline uint64_t ufs_mcq_op_reg_addr(UfsHc *u, int qid) in ufs_mcq_op_reg_addr() argument
58 static inline uint64_t ufs_reg_size(UfsHc *u) in ufs_reg_size() argument
61 return ufs_mcq_op_reg_addr(u, 0) + sizeof(u->mcq_op_reg); in ufs_reg_size()
64 static inline bool ufs_is_mcq_reg(UfsHc *u, uint64_t addr, unsigned size) in ufs_is_mcq_reg() argument
68 if (!u->params.mcq) { in ufs_is_mcq_reg()
72 mcq_reg_addr = ufs_mcq_reg_addr(u, 0); in ufs_is_mcq_reg()
74 addr + size <= mcq_reg_addr + sizeof(u->mcq_reg)); in ufs_is_mcq_reg()
77 static inline bool ufs_is_mcq_op_reg(UfsHc *u, uint64_t addr, unsigned size) in ufs_is_mcq_op_reg() argument
81 if (!u->params.mcq) { in ufs_is_mcq_op_reg()
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-imx8/sci/svc/pad/
H A Dapi.h10 #define SC_PAD_CONFIG_NORMAL 0U /* Normal */
11 #define SC_PAD_CONFIG_OD 1U /* Open Drain */
12 #define SC_PAD_CONFIG_OD_IN 2U /* Open Drain and input */
13 #define SC_PAD_CONFIG_OUT_IN 3U /* Output and input */
16 #define SC_PAD_ISO_OFF 0U /* ISO latch is transparent */
17 #define SC_PAD_ISO_EARLY 1U /* Follow EARLY_ISO */
18 #define SC_PAD_ISO_LATE 2U /* Follow LATE_ISO */
19 #define SC_PAD_ISO_ON 3U /* ISO latched data is held */
22 #define SC_PAD_28FDSOI_DSE_18V_1MA 0U /* Drive strength of 1mA for 1.8v */
23 #define SC_PAD_28FDSOI_DSE_18V_2MA 1U /* Drive strength of 2mA for 1.8v */
[all …]
/openbmc/qemu/target/i386/kvm/
H A Dhyperv-proto.h32 #define HV_VP_RUNTIME_AVAILABLE (1u << 0)
33 #define HV_TIME_REF_COUNT_AVAILABLE (1u << 1)
34 #define HV_SYNIC_AVAILABLE (1u << 2)
35 #define HV_SYNTIMERS_AVAILABLE (1u << 3)
36 #define HV_APIC_ACCESS_AVAILABLE (1u << 4)
37 #define HV_HYPERCALL_AVAILABLE (1u << 5)
38 #define HV_VP_INDEX_AVAILABLE (1u << 6)
39 #define HV_RESET_AVAILABLE (1u << 7)
40 #define HV_REFERENCE_TSC_AVAILABLE (1u << 9)
41 #define HV_ACCESS_FREQUENCY_MSRS (1u << 11)
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-imx8qxp-mek-u-boot.dtsi7 u-boot,dm-spl;
11 u-boot,dm-spl;
15 u-boot,dm-spl;
19 u-boot,dm-spl;
23 u-boot,dm-spl;
27 u-boot,dm-spl;
31 u-boot,dm-spl;
35 u-boot,dm-spl;
39 u-boot,dm-spl;
43 u-boot,dm-spl;
[all …]
H A Dstm32h7-u-boot.dtsi3 u-boot,dm-pre-reloc;
7 u-boot,dm-pre-reloc;
9 u-boot,dm-pre-reloc;
15 u-boot,dm-pre-reloc;
19 u-boot,dm-pre-reloc;
23 u-boot,dm-pre-reloc;
27 u-boot,dm-pre-reloc;
31 u-boot,dm-pre-reloc;
35 u-boot,dm-pre-reloc;
39 u-boot,dm-pre-reloc;
[all …]
H A Dstm32mp157-u-boot.dtsi23 u-boot,dm-pre-reloc;
27 u-boot,dm-pre-reloc;
31 u-boot,dm-pre-reloc;
37 u-boot,dm-pre-reloc;
43 u-boot,dm-pre-reloc;
47 u-boot,dm-pre-reloc;
51 u-boot,dm-pre-reloc;
55 u-boot,dm-pre-reloc;
59 u-boot,dm-pre-reloc;
63 u-boot,dm-pre-reloc;
[all …]
H A Domap3-u-boot.dtsi7 * Based on "omap5-u-boot.dtsi"
12 u-boot,dm-spl;
15 u-boot,dm-spl;
21 u-boot,dm-spl;
26 u-boot,dm-spl;
31 u-boot,dm-spl;
36 u-boot,dm-spl;
40 u-boot,dm-spl;
44 u-boot,dm-spl;
48 u-boot,dm-spl;
[all …]
H A Domap5-u-boot.dtsi21 u-boot,dm-spl;
32 u-boot,dm-spl;
38 u-boot,dm-spl;
43 u-boot,dm-spl;
48 u-boot,dm-spl;
52 u-boot,dm-spl;
56 u-boot,dm-spl;
60 u-boot,dm-spl;
64 u-boot,dm-spl;
68 u-boot,dm-spl;
[all …]
/openbmc/u-boot/drivers/tee/optee/
H A Doptee_msg_supplicant.h38 * [in] param[0].u.value.a OPTEE_MRF_OPEN
39 * [in] param[1].u.tmem a string holding the file name
40 * [out] param[2].u.value.a file descriptor of open file
47 * [in] param[0].u.value.a OPTEE_MRF_CREATE
48 * [in] param[1].u.tmem a string holding the file name
49 * [out] param[2].u.value.a file descriptor of open file
56 * [in] param[0].u.value.a OPTEE_MRF_CLOSE
57 * [in] param[0].u.value.b file descriptor of open file.
64 * [in] param[0].u.value.a OPTEE_MRF_READ
65 * [in] param[0].u.value.b file descriptor of open file
[all …]
/openbmc/qemu/tests/functional/acpi-bits/bits-tests/
H A Dsmbios.py271 u = unpack.Unpackable(self._header_memory)
72 self.add_field('header', Header(u))
74 u = unpack.Unpackable(self._structure_memory)
75 …self.add_field('structures', unpack.unpack_all(u, _smbios_structures, self), unpack.format_each("\…
95 def __new__(cls, u):
98 def __init__(self, u):
100 self.raw_data = u.unpack_rest()
101 u = unpack.Unpackable(self.raw_data)
102 self.add_field('anchor_string', u.unpack_one("4s"))
103 self.add_field('checksum', u.unpack_one("B"))
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-imx8/sci/svc/pm/
H A Dapi.h10 #define SC_PM_PW_MODE_OFF 0U /* Power off */
11 #define SC_PM_PW_MODE_STBY 1U /* Power in standby */
12 #define SC_PM_PW_MODE_LP 2U /* Power in low-power */
13 #define SC_PM_PW_MODE_ON 3U /* Power on */
16 #define SC_PM_CLK_SLV_BUS 0U /* Slave bus clock */
17 #define SC_PM_CLK_MST_BUS 1U /* Master bus clock */
18 #define SC_PM_CLK_PER 2U /* Peripheral clock */
19 #define SC_PM_CLK_PHY 3U /* Phy clock */
20 #define SC_PM_CLK_MISC 4U /* Misc clock */
21 #define SC_PM_CLK_MISC0 0U /* Misc 0 clock */
[all …]
/openbmc/u-boot/board/ti/am335x/
H A DREADME52 Step-1: Building u-boot for NAND boot
62 U-Boot # mmc rescan
64 U-Boot # nand erase.chip
65 U-Boot # env default -f -a
66 U-Boot # saveenv
68 U-Boot # load mmc 0 0x82000000 MLO
69 U-Boot # nand write 0x82000000 0x00000 0x20000
70 U-Boot # nand write 0x82000000 0x20000 0x20000
71 U-Boot # nand write 0x82000000 0x40000 0x20000
72 U-Boot # nand write 0x82000000 0x60000 0x20000
[all …]
/openbmc/qemu/host/include/i386/host/
H A Dcpuinfo.h11 #define CPUINFO_ALWAYS (1u << 0) /* so cpuinfo is nonzero */
12 #define CPUINFO_OSXSAVE (1u << 1)
13 #define CPUINFO_MOVBE (1u << 2)
14 #define CPUINFO_LZCNT (1u << 3)
15 #define CPUINFO_POPCNT (1u << 4)
16 #define CPUINFO_BMI1 (1u << 5)
17 #define CPUINFO_BMI2 (1u << 6)
18 #define CPUINFO_SSE2 (1u << 7)
19 #define CPUINFO_AVX1 (1u << 9)
20 #define CPUINFO_AVX2 (1u << 10)
[all …]
/openbmc/qemu/hw/9pfs/
H A Dtrace-events8 …, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d un…
9 …nt8_t id, uint8_t type, uint32_t version, uint64_t path) "tag %u id %u type %u version %u path %"P…
13 …e, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}"
17 …8_t type, uint32_t version, uint64_t path, int iounit) "tag %u id %u qid={type %u version %u path …
18 …2_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u"
19 …type, uint32_t version, uint64_t path, int32_t iounit) "tag %u id %u qid={type %u version %u path …
22 …id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u"
24 …t32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u"
25 …return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd"
26 …2_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d"
[all …]
/openbmc/u-boot/arch/arm/mach-omap2/
H A Dconfig.mk13 # u-boot-spl_HS_MLO
16 # u-boot-spl_HS_ULO
19 # u-boot-spl_HS_X-LOADER
21 ALL-y += u-boot-spl_HS_MLO
22 ALL-y += u-boot-spl_HS_ULO
23 ALL-y += u-boot-spl_HS_X-LOADER
28 # u-boot-spl_HS_SPI_X-LOADER
31 # u-boot-spl_HS_ISSW
33 ALL-y += u-boot-spl_HS_SPI_X-LOADER
34 ALL-y += u-boot-spl_HS_ISSW
[all …]
/openbmc/u-boot/doc/
H A DREADME.u-boot_on_efi5 U-Boot on EFI
7 This document provides information about U-Boot running on top of EFI, either
8 as an application or just as a means of getting U-Boot onto a new platform.
29 Running U-Boot on EFI is useful in several situations:
31 - You have EFI running on a board but U-Boot does not natively support it
32 fully yet. You can boot into U-Boot from EFI and use that until U-Boot is
38 - You plan to use coreboot to boot into U-Boot but coreboot support does
39 not currently exist for your platform. In the meantime you can use U-Boot
40 on EFI and then move to U-Boot on coreboot when ready
42 - You use EFI but want to experiment with a simpler alternative like U-Boot
[all …]
/openbmc/qemu/replay/
H A Dreplay-input.c30 key = evt->u.key.data; in replay_save_input_event()
35 replay_put_qword(key->key->u.number.data); in replay_save_input_event()
39 replay_put_dword(key->key->u.qcode.data); in replay_save_input_event()
48 btn = evt->u.btn.data; in replay_save_input_event()
53 move = evt->u.rel.data; in replay_save_input_event()
58 move = evt->u.abs.data; in replay_save_input_event()
63 mtt = evt->u.mtt.data; in replay_save_input_event()
90 evt.u.key.data = &key; in replay_read_input_event()
91 evt.u.key.data->key->type = replay_get_dword(); in replay_read_input_event()
93 switch (evt.u.key.data->key->type) { in replay_read_input_event()
[all …]
/openbmc/u-boot/include/
H A Dimx_lpi2c.h93 #define LPI2C_VERID_FEATURE_SHIFT (0U)
96 #define LPI2C_VERID_MINOR_SHIFT (16U)
99 #define LPI2C_VERID_MAJOR_SHIFT (24U)
104 #define LPI2C_PARAM_MTXFIFO_SHIFT (0U)
107 #define LPI2C_PARAM_MRXFIFO_SHIFT (8U)
112 #define LPI2C_MCR_MEN_SHIFT (0U)
115 #define LPI2C_MCR_RST_SHIFT (1U)
118 #define LPI2C_MCR_DOZEN_SHIFT (2U)
121 #define LPI2C_MCR_DBGEN_SHIFT (3U)
124 #define LPI2C_MCR_RTF_SHIFT (8U)
[all …]
/openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A DMakefile20 # Note on computing the post-IVT size field value for the U-Boot binary.
22 # -> The size of U-Boot binary aligned to 64B (u-boot.bin)
23 # -> The size of IVT block aligned to 64B (u-boot.ivt)
24 # -> The size of U-Boot signature (u-boot.sig), 3904 B
25 # -> The 64B hole in front of U-Boot binary for 'struct mxs_spl_data' passing
56 spl/u-boot-spl.ivt: spl/u-boot-spl.bin
61 u-boot.ivt: u-boot.bin
66 spl/u-boot-spl.csf: spl/u-boot-spl.ivt spl/u-boot-spl.bin board/$(VENDOR)/$(BOARD)/sign/u-boot-spl.…
69 u-boot.csf: u-boot.ivt u-boot.bin board/$(VENDOR)/$(BOARD)/sign/u-boot.csf
76 u-boot.sb: $(src)/$(MKIMAGE_TARGET-y) u-boot.bin spl/u-boot-spl.bin FORCE
[all …]
/openbmc/u-boot/arch/arm/mach-imx/
H A DMakefile110 …(cpp_flags) -x c -o spl/u-boot-spl.cfgout $(srctree)/$(IMX_CONFIG); if [ -f spl/u-boot-spl.cfgout …
111 …$(CPP) $(cpp_flags) -x c -o u-boot-dtb.cfgout $(srctree)/$(IMX_CONFIG); if [ -f u-boot-dtb.cfgout …
115 …(cpp_flags) -x c -o spl/u-boot-spl.cfgout $(srctree)/$(IMX_CONFIG);if [ -f spl/u-boot-spl.cfgout ]…
123 u-boot.imx: MKIMAGEOUTPUT = u-boot.imx.log
125 u-boot.imx: u-boot.bin u-boot.cfgout $(PLUGIN).bin FORCE
132 u-boot-dtb.imx: MKIMAGEOUTPUT = u-boot-dtb.imx.log
134 u-boot-dtb.imx: u-boot-dtb.bin u-boot-dtb.cfgout $(PLUGIN).bin FORCE
144 MKIMAGEFLAGS_flash.bin = -n spl/u-boot-spl.cfgout \
148 spl/u-boot-spl-ddr.bin: spl/u-boot-spl.bin spl/u-boot-spl.cfgout FORCE
150 $(IMX8M_DEPFILES) spl/u-boot-spl.cfgout 1
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-imx8/sci/svc/rm/
H A Dapi.h12 #define SC_RM_PARTITION_W 5U /* Width of sc_rm_pt_t */
13 #define SC_RM_MEMREG_W 6U /* Width of sc_rm_mr_t */
14 #define SC_RM_DID_W 4U /* Width of sc_rm_did_t */
15 #define SC_RM_SID_W 6U /* Width of sc_rm_sid_t */
16 #define SC_RM_SPA_W 2U /* Width of sc_rm_spa_t */
17 #define SC_RM_PERM_W 3U /* Width of sc_rm_perm_t */
24 #define SC_RM_SPA_PASSTHRU 0U /* Pass through (attribute driven by master) */
25 #define SC_RM_SPA_PASSSID 1U /* Pass through and output on SID */
26 #define SC_RM_SPA_ASSERT 2U /* Assert (force to be secure/privileged) */
27 #define SC_RM_SPA_NEGATE 3U /* Negate (force to be non-secure/user) */
[all …]
/openbmc/qemu/tests/tcg/i386/
H A Dtest-i386-snan-convert.c16 union { float f; uint32_t u; } u = { .f = x }; in issignaling_f() member
17 return (u.u & 0x7fffffff) > 0x7f800000 && (u.u & 0x400000) == 0; in issignaling_f()
22 union { double d; uint64_t u; } u = { .d = x }; in issignaling_d() local
23 return (((u.u & UINT64_C(0x7fffffffffffffff)) > in issignaling_d()
25 (u.u & UINT64_C(0x8000000000000)) == 0); in issignaling_d()
33 } u = { .ld = x }; in issignaling_ld() local
34 return ((u.s.sign_exp & 0x7fff) == 0x7fff && in issignaling_ld()
35 (u.s.sig >> 63) != 0 && in issignaling_ld()
36 (u.s.sig & UINT64_C(0x4000000000000000)) == 0); in issignaling_ld()

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