| /openbmc/linux/Documentation/driver-api/ |
| H A D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
35 * Channel
37 A memory controller channel, responsible to communicate with a group of
38 DIMMs. Each channel has its own independent control (command) and data
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
44 controller. Typically, it contains two channels. Two channels at the
49 is calculated using two DIMMs instead of one. Due to that, it is capable
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
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| /openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | fsl,imx8qxp-ldb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
19 For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color
20 format and can map the input to VESA or JEIDA standards. The two channels
22 them to use. Two LDB channels from two LDB instances can work together in
23 LDB split mode to support a dual link LVDS display. The channel indexes
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| H A D | fsl,imx8qxp-pixel-combiner.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a
14 single display controller and manipulates the two streams to support a number
16 either one screen, two screens, or virtual screens. The pixel combiner is
18 output channel.
23 - fsl,imx8qm-pixel-combiner
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| /openbmc/linux/Documentation/devicetree/bindings/dma/xilinx/ |
| H A D | xilinx_dma.txt | 2 It can be configured to have one channel or two channels. If configured
3 as two channels, one is to transmit to the video device and another is
7 target devices. It can be configured to have one channel or two channels.
8 If configured as two channels, one is to transmit to the device and another
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
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| /openbmc/linux/Documentation/driver-api/iio/ |
| H A D | core.rst | 8 :file:`drivers/iio/industrialio-*`
11 ----------------------
13 * struct iio_dev - industrial I/O device
14 * iio_device_alloc() - allocate an :c:type:`iio_dev` from a driver
15 * iio_device_free() - free an :c:type:`iio_dev` from a driver
16 * iio_device_register() - register a device with the IIO subsystem
17 * iio_device_unregister() - unregister a device from the IIO
25 There are two ways for a user space application to interact with an IIO driver.
33 :doc:`SPI <../spi>` driver and will create two routines, probe and remove.
63 :file:`Documentation/ABI/testing/sysfs-bus-iio` file in the Linux kernel
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| /openbmc/linux/Documentation/hwmon/ |
| H A D | lm93.rst | 10 Addresses scanned: I2C 0x2c-0x2e
18 Addresses scanned: I2C 0x2c-0x2e
24 - Mark M. Hoffman <mhoffman@lightlink.com>
25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com>
26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org>
27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de>
30 -----------------
33 Set to non-zero to force some initializations (default is 0).
38 Configures in7 and in8 limit type, where 0 means absolute and non-zero
54 --------------------
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| H A D | pcf8591.rst | 17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
35 - mode 1 : three differential inputs
39 - mode 2 : single ended and differential mixed
41 Pins AIN2 is the positive differential input for channel 3
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| /openbmc/linux/Documentation/devicetree/bindings/display/imx/ |
| H A D | ldb.txt | 1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
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| /openbmc/linux/drivers/comedi/drivers/ |
| H A D | cb_pcidda.c | 1 // SPDX-License-Identifier: GPL-2.0+
4 * Driver for the ComputerBoards / MeasurementComputing PCI-DDA series.
9 * COMEDI - Linux Control and Measurement Device Interface
10 * Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
15 * Description: MeasurementComputing PCI-DDA series
16 * Devices: [Measurement Computing] PCI-DDA08/12 (pci-dda08/12),
17 * PCI-DDA04/12 (pci-dda04/12), PCI-DDA02/12 (pci-dda02/12),
18 * PCI-DDA08/16 (pci-dda08/16), PCI-DDA04/16 (pci-dda04/16),
19 * PCI-DDA02/16 (pci-dda02/16)
45 #define CB_DDA_DA_CTRL_DAC(x) ((x) << 2) /* Specify DAC channel */
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| /openbmc/linux/Documentation/sound/cards/ |
| H A D | cmipci.rst | 2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
11 CM8x38 chip can use ADC as the second DAC so that two different stereo
12 channels can be used for front/rear playbacks. Since there are two
13 DACs, both streams are handled independently unlike the 4/6ch multi-
14 channel playbacks in the section below.
20 There are slight differences between the two DACs:
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
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| /openbmc/linux/Documentation/virt/hyperv/ |
| H A D | vmbus.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 VMbus is a software construct provided by Hyper-V to guest VMs. It
7 devices that Hyper-V presents to guest VMs. The control path is
11 and the synthetic device implementation that is part of Hyper-V, and
12 signaling primitives to allow Hyper-V and the guest to interrupt
17 establishes the VMbus control path with the Hyper-V host, then
21 Most synthetic devices offered by Hyper-V have a corresponding Linux
29 * PCI device pass-thru
34 * Key/Value Pair (KVP) exchange with Hyper-V
35 * Hyper-V online backup (a.k.a. VSS)
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| /openbmc/linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | arm,mhuv2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
16 communication with remote processor(s), where the number of channel windows
21 between two processing elements to provide bidirectional communication, these
22 must be specified as two separate mailboxes.
33 - Data-transfer: Each transfer is made of one or more words, using one or more
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| H A D | fsl,mu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The Messaging Unit module enables two processors within the SoC to
21 other. The MU accomplishes synchronization using two sets of matching
22 registers (Processor A-facing, Processor B-facing).
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
29 - const: fsl,imx8ulp-mu
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| /openbmc/linux/Documentation/userspace-api/media/v4l/ |
| H A D | vidioc-g-modulator.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_MODULATOR - VIDIOC_S_MODULATOR - Get or set modulator attributes
47 Modulators have two writable properties, an audio modulation set and the
52 this is a write-only ioctl, it does not return the actual audio
67 .. flat-table:: struct v4l2_modulator
68 :header-rows: 0
69 :stub-columns: 0
72 * - __u32
73 - ``index``
74 - Identifies the modulator, set by the application.
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| /openbmc/linux/arch/s390/include/uapi/asm/ |
| H A D | cmb.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
8 * struct cmbdata - channel measurement block data for user space
24 * Currently, two formats are known, which differ by the size of
25 * this structure, i.e. the last two members are only set when
26 * the extended channel measurement facility (first shipped in
47 /* enable channel measurement */
49 /* enable channel measurement */
51 /* read channel measurement data */
|
| /openbmc/linux/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| H A D | nvm-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2022 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 * enum iwl_regulatory_and_nvm_subcmd_ids - regulatory/NVM commands
53 * enum iwl_nvm_access_op - NVM access opcode
63 * enum iwl_nvm_access_target - target of the NVM_ACCESS_CMD
75 * enum iwl_nvm_section_type - section types for NVM_ACCESS_CMD
97 * struct iwl_nvm_access_cmd - Request the device to send an NVM section
115 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
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| /openbmc/phosphor-net-ipmid/command/ |
| H A D | channel_auth.hpp | 13 * IPMI Request data for Get Channel Authentication Capabilities command
24 * IPMI Response data for Get Channel Authentication Capabilities command
30 uint8_t channelNumber; // Channel number that the request was
64 // Anonymous login status for non-null usernames enabled/disabled
67 uint8_t perMessageAuth:1; // Per-message authentication support
68 // Two key login status . only for IPMI V2.0 RMCP+ RAKP
75 // Two key login status . only for IPMI V2.0 RMCP+ RAKP
77 uint8_t perMessageAuth:1; // Per-message authentication support
79 // Anonymous login status for non-null usernames enabled/disabled
89 uint8_t extCapabilities:2; // Channel support for IPMI V2.0 connections
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| /openbmc/linux/Documentation/admin-guide/media/ |
| H A D | imx.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
27 packed <--> planar conversion. The IDMAC can also perform a simple
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| /openbmc/linux/Documentation/devicetree/bindings/hwmon/ |
| H A D | adi,ltc2992.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Tachici <alexandru.tachici@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2992.pdf
19 - adi,ltc2992
24 '#address-cells':
27 '#size-cells':
30 avcc-supply: true
33 "^channel@([0-1])$":
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| /openbmc/linux/include/linux/platform_data/ |
| H A D | edma.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2006-2013 Texas Instruments.
9 * This EDMA3 programming framework exposes two basic kinds of resource:
11 * Channel Triggers transfers, usually from a hardware event but
13 * Each channel is coupled to a Parameter RAM (PaRAM) slot.
23 * is driven only from a channel, which performs the transfers specified
25 * transfer completes, the "link" field may be used to reload the channel's
28 * The EDMA Channel Controller (CC) maps requests from channels into physical
29 * Transfer Controller (TC) requests when the channel triggers (by hardware
30 * or software events, or by chaining). The two physical DMA channels provided
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | configfs-stp-policy | 1 What: /config/stp-policy
5 This group contains policies mandating Master/Channel allocation
9 What: /config/stp-policy/<device>.<policy>
19 What: /config/stp-policy/<device>.<policy>/device
26 What: /config/stp-policy/<device>.<policy>/<node>
31 use to request a master/channel to be allocated and assigned to
34 What: /config/stp-policy/<device>.<policy>/<node>/masters
39 Write two numbers: the first master and the last master number.
41 What: /config/stp-policy/<device>.<policy>/<node>/channels
46 Write two numbers: the first channel and the last channel
|
| /openbmc/linux/Documentation/devicetree/bindings/media/ |
| H A D | renesas,drif.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Gen3 Digital Radio Interface Controller (DRIF)
10 - Ramesh Shanmugasundaram <rashanmu@gmail.com>
11 - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
14 R-Car Gen3 DRIF is a SPI like receive only slave device. A general
17 +---------------------+ +---------------------+
18 | |-----SCK------->|CLK |
19 | Master |-----SS-------->|SYNC DRIFn (slave) |
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| /openbmc/linux/drivers/hwmon/ |
| H A D | pcf8591.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2001-2004 Aurelien Jarno <aurelien@aurel32.net>
28 " 3 = two differential inputs\n");
44 * 0x30 = two differential inputs
52 * Channel selection
53 * 0x00 = channel 0
54 * 0x01 = channel 1
55 * 0x02 = channel 2
56 * 0x03 = channel 3
65 #define REG_TO_SIGNED(reg) (((reg) & 0x80) ? ((reg) - 256) : (reg))
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| /openbmc/linux/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ |
| H A D | ia_css_xnr3_types.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
20 * CSS-API header file for Extra Noise Reduction (XNR) parameters.
25 * \details The define specifies which fixed-point value represents 1.0.
31 * \details The define specifies which fixed-point value represents 1.0.
37 * \details The define specifies which fixed-point value represents 1.0.
44 * A higher number means stronger filtering. There are two values for each of
46 * sigma parameters are fixed-point values between 0.0 and 1.0, scaled with
61 * thresholding technique to avoid false coloring. There are two values for
62 * each of the two chroma planes: one for dark areas and one for bright areas.
63 * All coring parameters are fixed-point values between 0.0 and 1.0, scaled
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| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | fsl,ssi.txt | 4 be programmed in AC97, I2S, left-justified, or right-justified modes.
7 - compatible: Compatible list, should contain one of the following
9 fsl,mpc8610-ssi
10 fsl,imx51-ssi
11 fsl,imx35-ssi
12 fsl,imx21-ssi
13 - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on.
14 - reg: Offset and length of the register set for the device.
15 - interrupts: <a b> where a is the interrupt number and b is a
21 - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
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