/openbmc/u-boot/arch/arm/cpu/arm920t/ep93xx/ |
H A D | timer.c | 43 const unsigned long now = TIMER_MAX_VAL - readl(&timer_regs->timer3.value); in read_timer() 91 writel(TIMER_CLKSEL, &timer_regs->timer3.control); in timer_init() 94 writel(TIMER_MAX_VAL, &timer_regs->timer3.load); in timer_init() 98 &timer_regs->timer3.control); in timer_init()
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/openbmc/linux/drivers/isdn/mISDN/ |
H A D | layer1.c | 22 struct FsmTimer timer3; member 178 mISDN_FsmDelTimer(&l1->timer3, 3); in l1_info4_ind() 229 mISDN_FsmRestartTimer(&l1->timer3, l1->t3_value, EV_TIMER3, NULL, 2); in l1_activate_s() 300 mISDN_FsmDelTimer(&l1->timer3, 0); in release_l1() 392 mISDN_FsmInitTimer(&nl1->l1m, &nl1->timer3); in create_l1()
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/openbmc/linux/drivers/pinctrl/ |
H A D | pinctrl-lpc18xx.c | 173 [FUNC_TIMER3] = "timer3", 263 LPC_P(2,0, SGPIO, UART0, EMC, USB0, GPIO, R, TIMER3, ENET, 0, ND); 264 LPC_P(2,1, SGPIO, UART0, EMC, USB0, GPIO, R, TIMER3, R, 0, ND); 265 LPC_P(2,2, SGPIO, UART0, EMC, USB0, GPIO, CTIN, TIMER3, R, 0, ND); 266 LPC_P(2,3, SGPIO, I2C1, UART3, CTIN, GPIO, R, TIMER3, USB0, 0, HD); 267 LPC_P(2,4, SGPIO, I2C1, UART3, CTIN, GPIO, R, TIMER3, USB0, 0, HD); 268 LPC_P(2,5, SGPIO, CTIN, USB1, ADCTRIG, GPIO, R, TIMER3, USB0, 0, HD); 269 LPC_P(2,6, SGPIO, UART0, EMC, USB0, GPIO, CTIN, TIMER3, R, 0, ND); 270 LPC_P(2,7, GPIO, CTOUT, UART3, EMC, R, R, TIMER3, R, 0, ND); 355 LPC_P(c,1, USB1, R, UART1, ENET, GPIO, R, TIMER3, SDMMC, 0, ND); [all …]
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/openbmc/linux/arch/arm64/boot/dts/altera/ |
H A D | socfpga_stratix10_swvp.dts | 19 timer3 = &timer3;
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/openbmc/linux/Documentation/devicetree/bindings/timer/ |
H A D | actions,owl-timer.txt | 10 "timer0", "timer1", "timer2", "timer3"
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H A D | ingenic,tcu.yaml | 180 - const: timer3 289 clock-names = "timer0", "timer1", "timer2", "timer3",
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/openbmc/u-boot/arch/arm/dts/ |
H A D | rk3188-radxarock-u-boot.dtsi | 34 &timer3 {
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H A D | socfpga_stratix10.dtsi | 306 timer3: timer3@ffd00100 { label
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H A D | socfpga.dtsi | 18 timer3 = &timer3; 862 timer3: timer3@ffd01000 { label
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | dra7-ipu-dsp-common.dtsi | 25 ti,timers = <&timer3>;
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H A D | omap2.dtsi | 225 timer3: timer@48078000 { label 229 ti,hwmods = "timer3";
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/openbmc/u-boot/arch/powerpc/include/asm/ |
H A D | immap_83xx.h | 108 u8 cfr2; /* Timer3/4 Configuration */ 118 u16 mdr3; /* Timer3 Mode Register */ 120 u16 rfr3; /* Timer3 Reference Register */ 122 u16 cpr3; /* Timer3 Capture Register */ 124 u16 cnr3; /* Timer3 Counter Register */ 128 u16 evr3; /* Timer3 Event Register */ 132 u16 psr3; /* Timer3 Prescaler Register */
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/openbmc/linux/arch/arm/boot/dts/intel/socfpga/ |
H A D | socfpga_vt.dts | 56 timer3@ffd01000 {
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H A D | socfpga.dtsi | 18 timer3 = &timer3; 898 timer3: timer3@ffd01000 { label
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/openbmc/linux/Documentation/devicetree/bindings/reset/ |
H A D | nxp,lpc1850-rgu.txt | 36 35 Timer3
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/openbmc/linux/arch/mips/include/asm/sgi/ |
H A D | pi1.h | 65 volatile u8 timer3; member
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/openbmc/linux/drivers/net/wireless/ath/ath5k/ |
H A D | pcu.c | 650 u32 timer1, timer2, timer3; in ath5k_hw_init_beacon_timers() local 684 /* Timer3 marks the end of our ATIM window in ath5k_hw_init_beacon_timers() 687 timer3 = next_beacon + 1; in ath5k_hw_init_beacon_timers() 700 ath5k_hw_reg_write(ah, timer3, AR5K_TIMER3); in ath5k_hw_init_beacon_timers() 765 * HW timer registers (TIMER0 - TIMER3), which are closely related to the
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | brcm,bcm2835-armctrl-ic.txt | 48 3: TIMER3
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | aspeed,ast2400-pinctrl.yaml | 165 - TIMER3
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H A D | cirrus,madera.yaml | 71 timer3-sts, timer4-sts, timer5-sts, timer6-sts,
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H A D | aspeed,ast2500-pinctrl.yaml | 194 - TIMER3
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/openbmc/u-boot/arch/arm/mach-aspeed/ast2400/ |
H A D | platform.S | 104 ldr r0, =0x1e782024 @ Set Timer3 Reload 107 ldr r0, =0x1e6c0038 @ Clear Timer3 ISR 111 ldr r0, =0x1e782030 @ Enable Timer3 117 ldr r0, =0x1e6c0090 @ Check ISR for Timer3 timeout 128 ldr r0, =0x1e782030 @ Disable Timer3 133 ldr r0, =0x1e6c0038 @ Clear Timer3 ISR 429 ldr r0, =0x1e782030 @ Init Timer3 Control 434 ldr r2, =0x00000064 @ Set Timer3 Reload = 100 us 474 ldr r2, =0x0000000B @ Set Timer3 Reload = 10 us 578 ldr r2, =0x0000000B @ Set Timer3 Reload = 10 us [all …]
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/openbmc/u-boot/arch/arm/mach-aspeed/ast2500/ |
H A D | platform.S | 254 ldr r0, =0x1e782024 @ Set Timer3 Reload 257 ldr r0, =0x1e6c0038 @ Clear Timer3 ISR 261 ldr r0, =0x1e782030 @ Enable Timer3 266 ldr r0, =0x1e6c0090 @ Check ISR for Timer3 timeout 277 ldr r0, =0x1e78203C @ Disable Timer3 282 ldr r0, =0x1e6c0038 @ Clear Timer3 ISR 624 ldr r2, =0x000003E8 @ Set Timer3 Reload = 1 ms 736 ldr r2, =0x00000BB8 @ Set Timer3 Reload = 3 ms 789 ldr r2, =0x00002710 @ Set Timer3 Reload = 10 ms 1649 ldr r2, =0x000493E0 @ Set Timer3 Reload = 300 ms [all …]
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/openbmc/linux/arch/arm/mach-omap2/ |
H A D | omap_hwmod_2xxx_ipblock_data.c | 192 /* timer3 */ 194 .name = "timer3",
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/openbmc/linux/arch/arm64/boot/dts/intel/ |
H A D | socfpga_agilex5.dtsi | 366 timer3: timer3@10d00100 { label
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