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/openbmc/u-boot/arch/mips/mach-mt7620/
H A Dlowlevel_init.S171 li t8, 0xfffff0f0
172 and t2, t2, t8
175 li t8, 0xfffff0f0
176 and t3, t3, t8
179 li t8, 0xfffff8ff
180 and t4, t4, t8
183 li t8, 0xfffff0f0
184 and t5, t5, t8
187 li t8, 0xfffff8ff
188 and t6, t6, t8
[all …]
/openbmc/linux/arch/alpha/lib/
H A Dstxncpy.S60 cmpbge zero, t2, t8 # .. e1 : bits set iff null found
63 bne t8, $a_eos # .. e1 :
74 cmpbge zero, t0, t8 # .. e1 (stall)
76 beq t8, $a_loop # e1 :
79 the end-of-count bit is set in t8 iff it applies.
83 t8 == the cmpbge mask that found it. */
86 negq t8, t12 # e0 : find low bit set
87 and t8, t12, t12 # e1 (stall)
98 or t12, t6, t8 # e0 :
100 zapnot t0, t8, t0 # e0 : clear src bytes > null
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H A Dev6-stxncpy.S72 cmpbge zero, t2, t8 # E : bits set iff null found
76 bne t8, $a_eos # U :
97 cmpbge zero, t0, t8 # E :
100 beq t8, $a_loop # U :
106 the end-of-count bit is set in t8 iff it applies.
110 t8 == the cmpbge mask that found it. */
113 negq t8, t12 # E : find low bit set
114 and t8, t12, t12 # E : (stall)
124 or t12, t6, t8 # E : (stall)
125 zapnot t0, t8, t0 # U : clear src bytes > null (stall)
[all …]
H A Dstxcpy.S52 cmpbge zero, t2, t8 # .. e1 : bits set iff null found
54 bne t8, $a_eos # .. e1 :
65 cmpbge zero, t1, t8 # e0 (stall)
66 beq t8, $a_loop # .. e1 (zdb)
71 t8 == the cmpbge mask that found it. */
73 negq t8, t6 # e0 : find low bit set
74 and t8, t6, t12 # e1 (stall)
86 or t12, t6, t8 # .. e1 :
87 zap t0, t8, t0 # e0 : clear dst bytes <= null
143 cmpbge zero, t6, t8 # .. e1 :
[all …]
H A Dev6-stxcpy.S64 cmpbge zero, t2, t8 # E : bits set iff null found
66 bne t8, $a_eos # U : (stall)
81 cmpbge zero, t1, t8 # E : (3 cycle stall)
82 beq t8, $a_loop # U : (stall for t8)
87 t8 == the cmpbge mask that found it. */
89 negq t8, t6 # E : find low bit set
90 and t8, t6, t12 # E : (stall)
101 or t12, t6, t8 # E : (stall)
103 zap t0, t8, t0 # E : clear dst bytes <= null
166 cmpbge zero, t6, t8 # E : (stall)
[all …]
H A Dstrrchr.S25 mov zero, t8 # .. e1 : t8 is last match byte compare mask
47 cmovne t3, t3, t8 # e0 :
62 cmovne t3, t3, t8 # .. e1 : save it, if match found
69 beq t8, $retnull # .. e1 :
71 and t8, 0xf0, t2 # e0 : binary search for the high bit set
72 cmovne t2, t2, t8 # .. e1 (zdb)
74 and t8, 0xcc, t1 # .. e1 :
75 cmovne t1, t1, t8 # e0 :
77 and t8, 0xaa, t0 # e0 :
H A Dev67-strrchr.S43 mov zero, t8 # E : t8 is last match byte compare mask
72 cmovne t3, t3, t8 # E : Latency=2, extra map slot
90 cmovne t3, t3, t8 # E : save it, if match found Latency=2, extra map slot
97 ctlz t8, t2 # U0 : Latency=3 (0x40 for t8=0)
100 cmoveq t8, 0x3f, t2 # E : Compensate for case when no match is seen
/openbmc/linux/arch/mips/lib/
H A Dcsum_partial.S111 sltiu t8, a1, 0x8
112 bnez t8, .Lsmall_csumcpy /* < 8 bytes to copy */
119 andi t8, src, 0x2
128 andi t8, src, 0x2
131 beqz t8, .Ldword_align
132 sltiu t8, a1, 56
137 sltiu t8, a1, 56
141 bnez t8, .Ldo_end_words
142 move t8, a1
144 andi t8, src, 0x4
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/openbmc/linux/tools/testing/selftests/bpf/prog_tests/
H A Dtracing_struct.c67 ASSERT_EQ(skel->bss->t8_a, 16, "t8:a"); in test_fentry()
68 ASSERT_EQ(skel->bss->t8_b, 17, "t8:b"); in test_fentry()
69 ASSERT_EQ(skel->bss->t8_c, 18, "t8:c"); in test_fentry()
70 ASSERT_EQ(skel->bss->t8_d, 19, "t8:d"); in test_fentry()
71 ASSERT_EQ(skel->bss->t8_e, 20, "t8:e"); in test_fentry()
72 ASSERT_EQ(skel->bss->t8_f_a, 21, "t8:f.a"); in test_fentry()
73 ASSERT_EQ(skel->bss->t8_f_b, 22, "t8:f.b"); in test_fentry()
74 ASSERT_EQ(skel->bss->t8_g, 23, "t8:g"); in test_fentry()
75 ASSERT_EQ(skel->bss->t8_ret, 156, "t8 ret"); in test_fentry()
/openbmc/linux/arch/loongarch/mm/
H A Dpage.S41 lu12i.w t8, 1 << (PAGE_SHIFT - 12)
42 add.d t8, t8, a0
81 bne t8, a0, 1b
/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
H A Ddmi.c24 BRCM_CC_4345_CHIP_ID, 6, "acepc-t8"
64 /* ACEPC T8 Cherry Trail Z8350 mini PC */
68 DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "T8"),
75 /* ACEPC T11 Cherry Trail Z8350 mini PC, same wifi as the T8 */
86 /* ACEPC W5 Pro Cherry Trail Z8350 HDMI stick, same wifi as the T8 */
112 /* The factory image nvram file is identical to the ACEPC T8 one */
/openbmc/linux/arch/loongarch/include/asm/vdso/
H A Dgettimeofday.h31 "$t8", "memory"); in gettimeofday_fallback()
50 "$t8", "memory"); in clock_gettime_fallback()
69 "$t8", "memory"); in clock_getres_fallback()
/openbmc/linux/tools/perf/util/hisi-ptt-decoder/
H A Dhisi-ptt-pkt-decoder.c36 * DW0 [ Fmt ][ Type ][T9][T8][TH][SO][ Length ][ Time ]
81 uint32_t t8 : 1; member
139 "T8", dw0.t8, "TH", dw0.th, "SO", dw0.so, "Length", in hisi_ptt_4dw_print_dw0()
/openbmc/linux/arch/arm64/crypto/
H A Dcrct10dif-ce-core.S88 t8 .req v22
141 pmull t8.8h, ad.8b, bd1.8b // E = A*B1
155 pmull2 t8.8h, ad.16b, bd1.16b // E = A*B1
162 0: eor t4.16b, t4.16b, t8.16b // L = E + F
166 uzp1 t8.2d, t4.2d, t5.2d
173 eor t8.16b, t8.16b, t4.16b
181 eor t8.16b, t8.16b, t4.16b
184 zip2 t5.2d, t8.2d, t4.2d
185 zip1 t4.2d, t8.2d, t4.2d
/openbmc/linux/arch/ia64/lib/
H A Dcopy_page.S45 t5[PIPE_DEPTH], t6[PIPE_DEPTH], t7[PIPE_DEPTH], t8[PIPE_DEPTH]
89 (p[0]) ld8 t8[0]=[src2],16
90 (EPI) st8 [tgt2]=t8[PIPE_DEPTH-1],16
/openbmc/linux/arch/loongarch/kernel/
H A Dswitch.S28 LONG_L t8, a1, TASK_STACK_CANARY
29 LONG_S t8, t7, 0
H A Dmcount_dyn.S50 PTR_S t8, sp, PT_R20
67 PTR_ADDI t8, sp, PT_SIZE
68 PTR_S t8, sp, PT_R3
H A Drethook_trampoline.S26 cfi_st t8, PT_R20
61 cfi_ld t8, PT_R20
/openbmc/linux/arch/mips/kernel/
H A Dbmips_5xxx_init.S324 * Trashes: a0, v0, v1, t0, t1, t2, t8
333 move t8, ra
399 jr t8
620 * Trashes: v0,v1,a0,a1,t8
629 move t8, ra
664 move ra, t8
716 * Trashes: v0, v1, t0, t1, t2, t5, t7, t8
H A Dr2300_switch.S39 PTR_LA t8, __stack_chk_guard
41 LONG_S t9, 0(t8)
H A Dr4k_switch.S35 PTR_LA t8, __stack_chk_guard
37 LONG_S t9, 0(t8)
H A Dscall32-o32.S64 load_a7: user_lw(t8, 28(t0)) # argument #8 from usp
70 sw t8, 28(sp) # argument #8 to ksp
169 li t8, 0
/openbmc/linux/arch/mips/power/
H A Dhibernate_asm.S38 REG_L t8, (t1)
39 REG_S t8, (t2)
/openbmc/linux/arch/loongarch/power/
H A Dhibernate_asm.S42 REG_L t8, t1, 0
43 REG_S t8, t2, 0
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_pps.c1287 seq->t8 = REG_FIELD_GET(PANEL_LIGHT_ON_DELAY_MASK, pp_on); in intel_pps_readout_hw_state()
1308 drm_dbg_kms(&i915->drm, "%s t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d\n", in intel_pps_dump_state()
1310 seq->t1_t3, seq->t8, seq->t9, seq->t10, seq->t11_t12); in intel_pps_dump_state()
1322 if (hw.t1_t3 != sw->t1_t3 || hw.t8 != sw->t8 || hw.t9 != sw->t9 || in intel_pps_verify_state()
1332 return delays->t1_t3 || delays->t8 || delays->t9 || in pps_delays_valid()
1393 spec->t8 = 50 * 10; /* no limit for t8, use t7 instead */ in pps_init_delays_spec()
1394 spec->t9 = 50 * 10; /* no limit for t9, make it symmetric with t8 */ in pps_init_delays_spec()
1427 assign_final(t8); in pps_init_delays()
1435 intel_dp->pps.backlight_on_delay = get_delay(t8); in pps_init_delays()
1453 * on them. For T8, even BSpec recommends doing it. For T9, if we in pps_init_delays()
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