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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra124-mc.yaml18 for DDR3L and LPDDR3 SDRAMs.
H A Dnvidia,tegra30-mc.yaml35 SDRAMs.
H A Datmel,ebi.txt4 asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
/openbmc/linux/drivers/cpufreq/
H A Dsa1110-cpufreq.c206 * the SDRAMs within their permissible period. The refresh period is
256 * The clock could be going away for some time. Set the SDRAMs in sa1110_target()
/openbmc/u-boot/arch/arm/cpu/pxa/
H A Dpxa2xx.c139 /* Wait for the clock to the SDRAMs to stabilize, 100..200 usec. */ in pxa2xx_dram_init()
/openbmc/linux/drivers/edac/
H A Dr82600_edac.c60 * 01=7.8usec (256Mbit SDRAMs)
/openbmc/ipmitool/lib/
H A Ddimm_spd.c878 * multi-load stacked SDRAMs; however, for the purposes of in ipmi_spd_print()
880 * monolithic and multi-load stack SDRAMs as having one logical in ipmi_spd_print()
/openbmc/u-boot/include/
H A Dmpc83xx.h1271 /* compatible to older SDRAMs */
/openbmc/linux/drivers/video/fbdev/aty/
H A Dradeon_pm.c1893 /* Full reset sdrams, this also re-inits the MDLL */ in radeon_reinitialize_M10()
2125 /* Full reset sdrams, this also re-inits the MDLL */ in radeon_reinitialize_M9P()