Searched full:sdrams (Results 1 – 9 of 9) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | nvidia,tegra124-mc.yaml | 18 for DDR3L and LPDDR3 SDRAMs.
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H A D | nvidia,tegra30-mc.yaml | 35 SDRAMs.
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H A D | atmel,ebi.txt | 4 asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
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/openbmc/linux/drivers/cpufreq/ |
H A D | sa1110-cpufreq.c | 206 * the SDRAMs within their permissible period. The refresh period is 256 * The clock could be going away for some time. Set the SDRAMs in sa1110_target()
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/openbmc/u-boot/arch/arm/cpu/pxa/ |
H A D | pxa2xx.c | 139 /* Wait for the clock to the SDRAMs to stabilize, 100..200 usec. */ in pxa2xx_dram_init()
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/openbmc/linux/drivers/edac/ |
H A D | r82600_edac.c | 60 * 01=7.8usec (256Mbit SDRAMs)
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/openbmc/ipmitool/lib/ |
H A D | dimm_spd.c | 878 * multi-load stacked SDRAMs; however, for the purposes of in ipmi_spd_print() 880 * monolithic and multi-load stack SDRAMs as having one logical in ipmi_spd_print()
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/openbmc/u-boot/include/ |
H A D | mpc83xx.h | 1271 /* compatible to older SDRAMs */
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/openbmc/linux/drivers/video/fbdev/aty/ |
H A D | radeon_pm.c | 1893 /* Full reset sdrams, this also re-inits the MDLL */ in radeon_reinitialize_M10() 2125 /* Full reset sdrams, this also re-inits the MDLL */ in radeon_reinitialize_M9P()
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