Searched full:rstgen (Results 1 – 4 of 4) sorted by relevance
169 rstgen: reset-controller@11840000 { label181 resets = <&rstgen JH7100_RSTN_I2C0_APB>;194 resets = <&rstgen JH7100_RSTN_I2C1_APB>;207 resets = <&rstgen JH7100_RSTN_GPIO_APB>;221 resets = <&rstgen JH7100_RSTN_UART2_APB>;234 resets = <&rstgen JH7100_RSTN_UART3_APB>;247 resets = <&rstgen JH7100_RSTN_I2C2_APB>;260 resets = <&rstgen JH7100_RSTN_I2C3_APB>;273 resets = <&rstgen JH7100_RSTN_WDTIMER_APB>,274 <&rstgen JH7100_RSTN_WDT>;[all …]
67 resets = <&rstgen JH7100_RSTN_TEMP_SENSE>,68 <&rstgen JH7100_RSTN_TEMP_APB>;
15 Tegra's clocks, and setting their rates. It comprises CLKGEN and RSTGEN units.25 RSTGEN provides the registers needed to control resetting of each block in