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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dxlnx,zynqmp-r5fss.yaml14 The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for
27 The RPU MPCore can operate in split mode (Dual-processor performance), Safety
28 lock-step mode(Both RPU cores execute the same code in lock-step,
29 clock-for-clock) or Single CPU mode (RPU core 0 is held in reset while
43 The RPU is located in the Low Power Domain of the Processor Subsystem.
48 Each RPU contains one 64KB memory and two 32KB memories that
63 - description: mailbox channel to send data to RPU
64 - description: mailbox channel to receive data from RPU
80 the RPU can execute instructions and access data from the OCM memory,
96 - description: region used for RPU firmware image section
/openbmc/linux/drivers/media/pci/cx18/
H A Dcx18-mailbox.c28 u8 rpu; /* Processing unit */ member
32 #define API_ENTRY(rpu, x, f) { (x), (f), (rpu), #x } argument
337 switch (order->rpu) { in epu_cmd()
388 switch (order->rpu) { in mb_ack_irq()
398 CX18_WARN("Unhandled RPU (%d) for command %x ack\n", in mb_ack_irq()
399 order->rpu, order->mb.cmd); in mb_ack_irq()
404 /* Don't ack if the RPU has gotten impatient and timed us out */ in mb_ack_irq()
408 rpu_str[order->rpu], rpu_str[order->rpu], req); in mb_ack_irq()
470 switch (order->rpu) { in epu_cmd_irq()
521 void cx18_api_epu_cmd_irq(struct cx18 *cx, int rpu) in cx18_api_epu_cmd_irq() argument
[all …]
H A Dcx18-mailbox.h77 void cx18_api_epu_cmd_irq(struct cx18 *cx, int rpu);
H A Dcx23418.h463 /* RPU is not ready to accept commands! */
466 /* RPU is not ready to accept commands! */
/openbmc/openbmc/meta-facebook/meta-ventura/recipes-phosphor/gpio/phosphor-gpio-monitor/
H A Dventura-phosphor-multi-gpio-monitor.json932 "FALLING": ["rpu-ready-deassert@rpu_ready.service"],
933 "RISING": ["rpu-ready-assert@rpu_ready.service"]
943 "FALLING": ["rpu-ready-deassert@rpu0_ready.service"],
944 "RISING": ["rpu-ready-assert@rpu0_ready.service"]
954 "FALLING": ["rpu-ready-deassert@rpu0_ready_spare.service"],
955 "RISING": ["rpu-ready-assert@rpu0_ready_spare.service"]
965 "FALLING": ["rpu-ready-deassert@rpu1_ready.service"],
966 "RISING": ["rpu-ready-assert@rpu1_ready.service"]
976 "FALLING": ["rpu-ready-deassert@rpu1_ready_spare.service"],
977 "RISING": ["rpu-ready-assert@rpu1_ready_spare.service"]
[all …]
H A Drpu-ready-deassert@.service7 SyslogIdentifier=rpu-ready-deassert
H A Drpu-ready-assert@.service7 SyslogIdentifier=rpu-ready-assert
/openbmc/qemu/hw/arm/
H A Dxlnx-versal.c144 object_initialize_child(OBJECT(s), "rpu-cluster", &s->lpd.rpu.cluster, in versal_create_rpu_cpus()
146 qdev_prop_set_uint32(DEVICE(&s->lpd.rpu.cluster), "cluster-id", 1); in versal_create_rpu_cpus()
148 for (i = 0; i < ARRAY_SIZE(s->lpd.rpu.cpu); i++) { in versal_create_rpu_cpus()
151 object_initialize_child(OBJECT(&s->lpd.rpu.cluster), in versal_create_rpu_cpus()
152 "rpu-cpu[*]", &s->lpd.rpu.cpu[i], in versal_create_rpu_cpus()
154 obj = OBJECT(&s->lpd.rpu.cpu[i]); in versal_create_rpu_cpus()
159 object_property_set_int(obj, "core-count", ARRAY_SIZE(s->lpd.rpu.cpu), in versal_create_rpu_cpus()
161 object_property_set_link(obj, "memory", OBJECT(&s->lpd.rpu.mr), in versal_create_rpu_cpus()
166 qdev_realize(DEVICE(&s->lpd.rpu.cluster), NULL, &error_fatal); in versal_create_rpu_cpus()
761 for (i = 0; i < ARRAY_SIZE(s->lpd.rpu.cpu); i++) { in versal_create_crl()
[all …]
H A Dxlnx-zynqmp.c222 /* Don't create rpu-cluster object if there's nothing to put in it */ in xlnx_zynqmp_create_rpu()
226 object_initialize_child(OBJECT(s), "rpu-cluster", &s->rpu_cluster, in xlnx_zynqmp_create_rpu()
233 object_initialize_child(OBJECT(&s->rpu_cluster), "rpu-cpu[*]", in xlnx_zynqmp_create_rpu()
/openbmc/linux/drivers/input/touchscreen/
H A Dwm9713.c32 * i.e. pull up resistance = 64k Ohms / rpu.
37 static int rpu = 8; variable
38 module_param(rpu, int, 0);
39 MODULE_PARM_DESC(rpu, "Set internal pull up resistor for pen detect.");
159 /* rpu */ in wm9713_phy_init()
160 if (rpu) { in wm9713_phy_init()
162 dig3 |= WM9712_RPU(rpu); in wm9713_phy_init()
164 64000 / rpu); in wm9713_phy_init()
H A Dwm9712.c32 * i.e. pull up resistance = 64k Ohms / rpu.
37 static int rpu = 8; variable
38 module_param(rpu, int, 0);
39 MODULE_PARM_DESC(rpu, "Set internal pull up resistor for pen detect.");
156 /* WM9712 rpu */ in wm9712_phy_init()
157 if (rpu) { in wm9712_phy_init()
159 dig2 |= WM9712_RPU(rpu); in wm9712_phy_init()
161 64000 / rpu); in wm9712_phy_init()
/openbmc/linux/drivers/cdx/
H A Dcdx.c15 * Firmware resides on RPU (Realtime CPUs) which interacts with
16 * the FPGA program manager and the APUs. The RPU provides memory-mapped
17 * interface (RPU if) which is used to communicate with APUs.
34 * +------------------------| RPU if |----+
37 * | Realtime CPUs (RPU) |
50 * The RPU firmware extracts the device information from the loaded FPGA
53 * a dedicated communication channel. RPU mediates operations such as
55 * done using memory mapped interface provided by the RPU to APU.
/openbmc/linux/drivers/remoteproc/
H A Dxlnx_r5_remoteproc.c29 * settings for RPU cluster mode which
88 * @dev: device of RPU instance
89 * @np: device node of RPU instance
90 * @tcm_bank_count: number TCM banks accessible to this RPU
93 * @pm_domain_id: RPU CPU power domain id
157 * We only use IPI for interrupt. The RPU firmware side may or may in handle_event_notified()
296 * set RPU cluster and TCM operation mode
299 * @fw_reg_val: value expected by firmware to configure RPU cluster mode
312 dev_err(r5_core->dev, "failed to set RPU mode\n"); in zynqmp_r5_set_mode()
357 dev_dbg(r5_core->dev, "RPU boot addr 0x%llx from %s.", rproc->bootaddr, in zynqmp_r5_rproc_start()
[all …]
H A DKconfig366 It's safe to say N if not interested in using RPU r5f cores.
/openbmc/openbmc/meta-facebook/meta-minerva/recipes-phosphor/gpio/
H A Dphosphor-gpio-monitor_%.bbappend9 rpu-ready-assert@.service \
10 rpu-ready-deassert@.service \
/openbmc/openbmc/meta-facebook/meta-ventura/recipes-phosphor/gpio/
H A Dphosphor-gpio-monitor_%.bbappend10 rpu-ready-assert@.service \
11 rpu-ready-deassert@.service \
/openbmc/openbmc/meta-facebook/meta-minerva/recipes-phosphor/gpio/phosphor-gpio-monitor/
H A Drpu-ready-deassert@.service7 SyslogIdentifier=rpu-ready-deassert
H A Drpu-ready-assert@.service7 SyslogIdentifier=rpu-ready-assert
H A Dminerva-phosphor-multi-gpio-monitor.json800 "FALLING": ["rpu-ready-deassert@rpu_ready.service"],
801 "RISING": ["rpu-ready-assert@rpu_ready.service"]
811 "FALLING": ["rpu-ready-deassert@rpu_ready_spare.service"],
812 "RISING": ["rpu-ready-assert@rpu_ready_spare.service"]
/openbmc/linux/include/linux/mfd/wm831x/
H A Dpdata.h75 int rpu; /** Pen down sensitivity resistor divider */ member
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dpistachio-clock.txt20 The core clock controller generates clocks for the CPU, RPU (WiFi + BT
/openbmc/linux/drivers/firmware/xilinx/
H A Dzynqmp.c1279 * zynqmp_pm_get_rpu_mode() - Get RPU mode
1286 * to current rpu mode.
1305 * zynqmp_pm_set_rpu_mode() - Set RPU mode
1309 * This function is used to set RPU mode to split or
1328 * This function is used to set RPU mode to split or combined
/openbmc/qemu/include/hw/arm/
H A Dxlnx-versal.h95 } rpu; member
/openbmc/u-boot/arch/arm/mach-zynqmp/
H A Dmp.c160 printf("RPU CPU%d %s\n", nr - 4, val ? "OFF" : "ON"); in cpu_status()
/openbmc/linux/Documentation/ABI/stable/
H A Dsysfs-driver-firmware-zynqmp76 RPU, PMU, etc. Only the PL domain (FPGA)

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