| /openbmc/qemu/include/hw/core/ |
| H A D | sysemu-cpu-ops.h | 7 * See the COPYING file in the top-level directory.
52 * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
53 * 32-bit VM coredump.
58 * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
59 * 64-bit VM coredump.
64 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
65 * note to a 32-bit VM coredump.
70 * @write_elf64_qemunote: Callback for writing a CPU- and QEMU-specific ELF
71 * note to a 64-bit VM coredump.
77 * runtime configurable endianness is currently big-endian.
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| /openbmc/linux/include/uapi/linux/ |
| H A D | tps6594_pfsm.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * Userspace ABI for TPS6594 PMIC Pre-configurable Finite State Machine
5 * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
16 * struct pmic_state_opt - PMIC state options
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| /openbmc/linux/drivers/misc/ |
| H A D | tps6594-pfsm.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * PFSM (Pre-configurable Finite State Machine) driver for TI TPS6594/TPS6593/LP8764 PMICs
5 * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
35 #define TPS6594_FILE_TO_PFSM(f) container_of((f)->private_data, struct tps6594_pfsm, miscdev)
38 * struct tps6594_pfsm - device private data structure
58 return -EINVAL; in tps6594_pfsm_read()
61 if (count > TPS6594_PMIC_MAX_POS - pos) in tps6594_pfsm_read()
62 count = TPS6594_PMIC_MAX_POS - pos; in tps6594_pfsm_read()
65 ret = regmap_read(pfsm->regmap, pos + i, &val); in tps6594_pfsm_read()
70 return -EFAULT; in tps6594_pfsm_read()
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
27 See Documentation/misc-devices/ad525x_dpot.rst for the
40 module will be called ad525x_dpot-i2c.
51 module will be called ad525x_dpot-spi.
65 This option enables device driver support for in-band access to the
78 website <https://www-03.ibm.com/systems/info/x86servers/serverproven/compat/us/>
189 called smpro-errmon.
199 called smpro-misc.
202 tristate "CS5535/CS5536 Geode Multi-Function General Purpose Timer (MFGPT) support"
209 than the generic PIT, and are suitable for use as high-res timers.
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| /openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| H A D | README.soc | 13 ---------
14 The LS1043A integrated multicore processor combines four ARM Cortex-A53
20 - Four 64-bit ARM Cortex-A53 CPUs
21 - 1 MB unified L2 Cache
22 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
24 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
26 - Packet parsing, classification, and distribution (FMan)
27 - Queue management for scheduling, packet sequencing, and congestion
29 - Hardware buffer management for buffer allocation and de-allocation (BMan)
30 - Cryptography acceleration (SEC)
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| /openbmc/linux/Documentation/driver-api/media/ |
| H A D | camera-sensor.rst | 1 .. SPDX-License-Identifier: GPL-2.0
6 CSI-2 and parallel (BT.601 and BT.656) busses
7 ---------------------------------------------
9 Please see :ref:`transmitter-receiver`.
12 ---------------
23 elsewhere. Therefore only the pre-determined frequencies are configurable by the
29 Read the ``clock-frequency`` _DSD property to denote the frequency. The driver
35 The currently preferred way to achieve this is using ``assigned-clocks``,
36 ``assigned-clock-parents`` and ``assigned-clock-rates`` properties. See
37 ``Documentation/devicetree/bindings/clock/clock-bindings.txt`` for more
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| /openbmc/linux/drivers/media/dvb-frontends/ |
| H A D | drxk_hard.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define SCU_RESULT_SIZE -4
25 #define SCU_RESULT_INVPAR -3
26 #define SCU_RESULT_UNKSTD -2
27 #define SCU_RESULT_UNKCMD -1
189 u16 top; /* rf-agc take over point */
190 u16 cut_off_current; /* rf-agc is accelerated if output current
191 is below cut-off current */
197 u16 reference; /* pre SAW reference value, range 0 .. 31 */
198 bool use_pre_saw; /* TRUE algorithms must use pre SAW sense */
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| /openbmc/linux/Documentation/misc-devices/ |
| H A D | tps6594-pfsm.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 Strictly speaking, PFSM (Pre-configurable Finite State Machine) is not
23 ---------------
25 - tps6594-q1
26 - tps6593-q1
27 - lp8764-q1
32 drivers/misc/tps6594-pfsm.c
48 required to be always-on, are turned off (low-power).
78 # hexdump -C /dev/pfsm-0-0x48
85 ----------------------
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| /openbmc/u-boot/arch/x86/cpu/queensbay/ |
| H A D | tnc.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 #include <dm/device-internal.h>
63 * the finding process instead of re-enumerating the whole PCI bus, so in disable_igd()
66 * Note x86 PCI enueration normally happens twice, in pre-relocation in disable_igd()
67 * phase and post-relocation. One option might be to call disable_igd() in disable_igd()
68 * in one of the pre-relocation initialization hooks so that it gets in disable_igd()
73 * in the post-relocation phase. If we disable IGD and SDVO devices, in disable_igd()
111 writel(INTA, &rcba->d02ip); in tnc_irq_init()
112 writel(INTA, &rcba->d03ip); in tnc_irq_init()
113 writel(INTA, &rcba->d27ip); in tnc_irq_init()
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| /openbmc/linux/Documentation/driver-api/thermal/ |
| H A D | exynos_thermal.rst | 15 ---------------------------
19 The chip only exposes the measured 8-bit temperature code value
27 Tc = (T - 25) * (TI2 - TI1) / (85 - 25) + TI1
31 Tc = T + TI1 - 25
47 when temperature exceeds pre-defined levels.
48 The maximum number of configurable threshold is five.
65 -----------------------
74 TMU configuration data -----> TMU Driver <----> Exynos Core thermal wrapper
|
| /openbmc/linux/drivers/clk/ |
| H A D | clk-npcm8xx.c | 1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/clk-provider.h>
23 #include <dt-bindings/clock/nuvoton,npcm845-clk.h>
24 #include <soc/nuvoton/clock-npcm8xx.h>
188 /* configurable pre dividers: */
190 { NPCM8XX_CLKDIV1, 21, 5, "pre_adc", &npcm8xx_muxes[6].hw, CLK_DIVIDER_READ_ONLY, 0, -1 },
194 /* configurable dividers: */
237 val = readl_relaxed(pll->pllcon); in npcm8xx_clk_pll_recalc_rate()
265 return ERR_PTR(-ENOMEM); in npcm8xx_clk_register_pll()
273 pll->pllcon = pllcon; in npcm8xx_clk_register_pll()
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| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | ti,tps6594.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Julien Panis <jpanis@baylibre.com>
15 PFSM (Pre-configurable Finite State Machine) managing the state of the device.
16 TPS6594 is the super-set device while TPS6593 and LP8764 are derivatives.
21 - ti,lp8764-q1
22 - ti,tps6593-q1
23 - ti,tps6594-q1
29 ti,primary-pmic:
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| /openbmc/linux/Documentation/core-api/ |
| H A D | genericirq.rst | 7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
29 __do_IRQ() super-handler, which is able to deal with every type of
36 - Level type
38 - Edge type
40 - Simple type
44 - Fast EOI type
46 In the SMP world of the __do_IRQ() super-handler another type was
49 - Per CPU type
51 This split implementation of high-level IRQ handlers allows us to
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| /openbmc/u-boot/doc/ |
| H A D | README.xtensa | 1 U-Boot for the Xtensa Architecture
5 -------------------------------------
7 Xtensa is a configurable processor architecture from Tensilica, Inc.
8 Diamond Cores are pre-configured instances available for license and
12 and custom instructions, registers and co-processors. The custom core
18 Xtensa CPUs in U-Boot. Therefore, there is only a single 'xtensa' CPU
19 in the cpu tree of U-Boot.
21 In the same manner as the Linux port to Xtensa, U-Boot adapts to an
24 abstraction layer (HAL). For the purpose of U-Boot, the HAL consists only
30 --------------------------------------------------------
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-cpu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
21 * for each configurable rate which is then used to program the clock hardware
22 * registers to acheive a fast co-oridinated rate change for all the CPU domain
36 #include <linux/clk-provider.h>
37 #include "clk-cpu.h"
101 pr_err("%s: re-parenting mux timed-out\n", __func__); in wait_until_mux_stable()
148 /* handler for pre-rate change notification from parent clock */
152 const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk->cfg; in exynos_cpuclk_pre_rate_change()
153 unsigned long alt_prate = clk_hw_get_rate(cpuclk->alt_parent); in exynos_cpuclk_pre_rate_change()
159 while ((cfg_data->prate * 1000) != ndata->new_rate) { in exynos_cpuclk_pre_rate_change()
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| /openbmc/linux/drivers/clocksource/ |
| H A D | timer-cadence-ttc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2013 Xilinx
23 * This driver configures the 2 16/32-bit count-up timers as follows:
30 * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
33 * The input frequency to the timer module in silicon is configurable and
34 * obtained from device tree. The pre-scaler of 32 is used.
55 * Setup the timers to use pre-scaling, using a fixed value for now that will
60 #define CLK_CNTRL_PRESCALE ((PRESCALE_EXPONENT - 1) << 1)
67 * struct ttc_timer - This definition defines local timer structure
105 * ttc_set_interval - Set the timer interval value
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| /openbmc/linux/drivers/gpu/drm/ |
| H A D | drm_blend.c | 43 * sub-pixel accuracy, which is scaled up to a pixel-aligned destination
96 * plane-wide opacity, from transparent (0) to opaque (0xffff). It can be
99 * pre-multiplied by the global alpha associated to the plane.
109 * "rotate-<degrees>":
113 * "reflect-<axis>":
117 * reflect-x::
120 * | | -> | |
123 * reflect-y::
126 * | | -> | |
137 * value can also be immutable, to inform userspace about the hard-coded
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| /openbmc/u-boot/include/configs/ |
| H A D | ls1043a_common.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
82 * with U-Boot image. Here u-boot max. size is 512K. So if binary
84 * it uses raw u-boot image instead of fit image.
112 * with U-Boot image. Here u-boot max. size is 512K. So if binary
114 * it uses raw u-boot image instead of fit image.
209 /* FMan fireware Pre-load address */
219 /* Miscellaneous configurable options */
|
| H A D | TQM834x.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
39 /* board pre init: do not call, nothing to do */
138 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
172 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 12 /* 10ms +/- 20% */
200 /* Options are: TSEC[0-1] */
254 * Miscellaneous configurable options
307 /* i-cache and d-cache disabled */
315 /* DDR 0 - 512M */
440 "bootm ${kernel_addr} - ${fdt_addr}\0" \
450 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
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| /openbmc/linux/drivers/block/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
28 <file:Documentation/admin-guide/blockdev/floppy.rst>.
41 special low-level hardware accesses to them (access and use
42 non-standard formats, for example), then enable this.
64 If you have a SWIM-3 (Super Woz Integrated Machine 3; from Apple)
95 tristate "SEGA Dreamcast GD-ROM drive"
100 "GD-ROM" by SEGA to signify it is capable of reading special disks
114 The User-Mode Linux port includes a driver called UBD which will let
124 host's disk; this may cause problems if, for example, the User-Mode
129 immediately) is configurable on a per-UBD basis by using a special
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| /openbmc/linux/drivers/platform/x86/ |
| H A D | apple-gmux.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2010-2012 Andreas Heider <andreas@meetr.de>
19 #include <linux/apple-gmux.h>
32 * A `Lattice XP2`_ on pre-retinas, a `Renesas R4F2113`_ on pre-T2 retinas.
41 * dual GPUs but no built-in display.)
45 * to access a pre-retina gmux are infixed ``_pio_``, those for a pre-T2
54 * https://www.nxp.com/docs/en/data-sheet/PCAL6524.pdf
112 return inb(gmux_data->iostart + port); in gmux_pio_read8()
118 outb(val, gmux_data->iostart + port); in gmux_pio_write8()
123 return inl(gmux_data->iostart + port); in gmux_pio_read32()
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| /openbmc/u-boot/drivers/i2c/ |
| H A D | Kconfig | 23 Enable old-style I2C functions for compatibility with existing code.
41 ---help---
43 often dealt with by using an I2C pass-through interface provided by
44 the EC. On some unfortunate models (e.g. Spring) the pass-through
57 behaviour similar to old (i.e. pre DM) I2C bus driver.
71 configuration is given by the device tree. Kernel-style device tree
73 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
82 i2c-gpio driver unless your system can cope with this limitation.
83 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
141 Only single master mode is supported and only byte-by-byte
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| /openbmc/linux/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| H A D | rx.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2022 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2015-2017 Intel Deutschland GmbH
10 /* API for pre-9000 hardware */
26 * struct iwl_rx_phy_info - phy info
28 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
29 * @cfg_phy_cnt: configurable DSP phy data byte count
30 * @stat_id: configurable DSP phy data set ID
34 * @beacon_time_stamp: beacon at on-air rise
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| /openbmc/linux/Documentation/arch/x86/ |
| H A D | tdx.rst | 1 .. SPDX-License-Identifier: GPL-2.0
19 TDX includes new hypercall-like mechanisms for communicating from the
25 TDX guests behave differently from bare-metal and traditional VMX guests.
32 Instruction-based #VE
33 ---------------------
35 - Port I/O (INS, OUTS, IN, OUT)
36 - HLT
37 - MONITOR, MWAIT
38 - WBINVD, INVD
39 - VMCALL
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| /openbmc/linux/drivers/gpu/drm/vc4/ |
| H A D | vc4_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2015 Broadcom
11 * OpenGL ES 2.0-compatible 3D engine called V3D, and a highly
12 * configurable display output pipeline that supports HDMI, DSI, DPI,
16 * compute shader-style jobs using the same shader processor as is
26 #include <linux/dma-mapping.h>
39 #include <soc/bcm2835/raspberrypi-firmware.h>
67 int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8); in vc4_dumb_fixup_args()
69 if (args->pitch < min_pitch) in vc4_dumb_fixup_args()
70 args->pitch = min_pitch; in vc4_dumb_fixup_args()
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|