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/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566.dtsi16 clocks = <&cru PCLK_PIPE>;
H A Drk3568.dtsi221 <&cru PCLK_PIPE>;
247 clocks = <&cru PCLK_PIPE>;
H A Drk356x.dtsi1704 <&cru PCLK_PIPE>;
1720 <&cru PCLK_PIPE>;
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-naneng-combphy.yaml134 <&cru PCLK_PIPE>;
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3568.c807 COMPOSITE_NOMUX(PCLK_PIPE, "pclk_pipe", "aclk_pipe", 0,
816 GATE(PCLK_PCIE20, "pclk_pcie20", "pclk_pipe", 0,
826 GATE(PCLK_PCIE30X1, "pclk_pcie30x1", "pclk_pipe", 0,
836 GATE(PCLK_PCIE30X2, "pclk_pcie30x2", "pclk_pipe", 0,
875 GATE(PCLK_XPCS, "pclk_xpcs", "pclk_pipe", 0,
/openbmc/linux/include/dt-bindings/clock/
H A Drk3568-cru.h190 #define PCLK_PIPE 127 macro