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Searched full:pcie2 (Results 1 – 25 of 140) sorted by relevance

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/openbmc/linux/drivers/bcma/
H A Ddriver_pcie2.c20 static u32 bcma_core_pcie2_cfg_read(struct bcma_drv_pcie2 *pcie2, u32 addr)
22 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, addr);
23 pcie2_read32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR);
24 return pcie2_read32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA);
28 static void bcma_core_pcie2_cfg_write(struct bcma_drv_pcie2 *pcie2, u32 addr, in bcma_core_pcie2_cfg_write() argument
31 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, addr); in bcma_core_pcie2_cfg_write()
32 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, val); in bcma_core_pcie2_cfg_write()
39 static u32 bcma_core_pcie2_war_delay_perst_enab(struct bcma_drv_pcie2 *pcie2, in bcma_core_pcie2_war_delay_perst_enab() argument
45 val = pcie2_read32(pcie2, BCMA_CORE_PCIE2_CLK_CONTROL); in bcma_core_pcie2_war_delay_perst_enab()
52 pcie2_write32(pcie2, (BCMA_CORE_PCIE2_CLK_CONTROL), val); in bcma_core_pcie2_war_delay_perst_enab()
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dp5020_serdes.c13 [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
17 PCIE2, AURORA, PCIE3, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3,
20 PCIE2, AURORA, PCIE3, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3,
25 [0x11] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
28 [0x13] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
32 [0x14] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
36 [0x15] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
39 [0x16] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
74 [0x28] = {PCIE1, PCIE1, PCIE3, PCIE3, PCIE2, PCIE2, PCIE2, PCIE2,
77 [0x29] = {PCIE1, PCIE1, PCIE3, PCIE3, PCIE2, PCIE2, PCIE2, PCIE2,
[all …]
H A Dp3041_serdes.c13 [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
17 PCIE2, AURORA, PCIE3, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3,
20 PCIE2, AURORA, PCIE3, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3,
25 [0x11] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
28 [0x13] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
32 [0x14] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
36 [0x15] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
39 [0x16] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
74 [0x28] = {PCIE1, PCIE1, PCIE3, PCIE3, PCIE2, PCIE2, PCIE2, PCIE2,
77 [0x29] = {PCIE1, PCIE1, PCIE3, PCIE3, PCIE2, PCIE2, PCIE2, PCIE2,
[all …]
H A Dt1040_serdes.c14 PCIE2, PCIE2, PCIE2, PCIE2},
16 PCIE2, PCIE3, PCIE4, SATA1},
18 PCIE2, PCIE3, SATA2, SATA1},
20 PCIE2, PCIE2, PCIE2, PCIE2},
22 PCIE2, PCIE2, PCIE2, PCIE2},
24 PCIE2, PCIE3, PCIE4, SATA1},
26 PCIE2, PCIE3, PCIE4, SGMII_FM1_DTSEC5},
28 PCIE2, PCIE3, SGMII_FM1_DTSEC4, SATA1},
30 PCIE2, PCIE3, PCIE4, SATA1},
32 PCIE2, PCIE2, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5},
[all …]
H A Dp2041_serdes.c16 [0x5] = {NONE, NONE, PCIE1, PCIE3, PCIE2, PCIE2, PCIE2, PCIE2,
19 [0x8] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
20 PCIE2, PCIE2, PCIE2, NONE, NONE, NONE, NONE, SATA1,
22 [0x9] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
23 PCIE2, PCIE2, PCIE2, NONE, NONE, XAUI_FM1, XAUI_FM1,
25 [0xa] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
26 PCIE2, PCIE2, PCIE2, NONE, NONE, PCIE3, PCIE3, PCIE3,
31 [0x14] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
32 PCIE2, SRIO1, SRIO1, NONE, NONE, AURORA,
35 [0x16] = {NONE, NONE, PCIE1, PCIE3, PCIE2, PCIE2, SGMII_FM1_DTSEC3,
[all …]
H A Dp5040_serdes.c20 [0x00] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
24 [0x01] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
28 [0x02] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, SGMII_FM1_DTSEC3,
32 [0x03] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, SGMII_FM2_DTSEC1,
37 [0x04] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE3, SGMII_FM2_DTSEC1,
42 [0x05] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE3, SGMII_FM1_DTSEC3,
54 [0x11] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
58 [0x15] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
61 [0x2a] = {PCIE1, PCIE1, PCIE3, PCIE3, PCIE2, PCIE2, PCIE2, PCIE2,
69 [0x35] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2,
H A Dp1022_serdes.c24 [0x06] = {PCIE1, PCIE3, SGMII_TSEC1, PCIE2},
25 [0x07] = {PCIE1, PCIE3, SGMII_TSEC1, PCIE2},
32 [0x15] = {PCIE1, PCIE3, PCIE2, PCIE2},
33 [0x16] = {PCIE1, PCIE3, PCIE2, PCIE2},
34 [0x17] = {PCIE1, PCIE3, PCIE2, PCIE2},
35 [0x18] = {PCIE1, PCIE1, PCIE2, PCIE2},
36 [0x19] = {PCIE1, PCIE1, PCIE2, PCIE2},
37 [0x1a] = {PCIE1, PCIE1, PCIE2, PCIE2},
38 [0x1b] = {PCIE1, PCIE1, PCIE2, PCIE2},
40 [0x1d] = {PCIE1, PCIE1, PCIE2, PCIE2},
[all …]
H A Dbsc9132_serdes.c19 [1] = {PCIE1, PCIE2, CPRI2, CPRI1},
20 [2] = {PCIE1, PCIE2, CPRI2, CPRI1},
21 [3] = {PCIE1, PCIE2, CPRI2, CPRI1},
22 [4] = {PCIE1, PCIE2, CPRI2, CPRI1},
23 [5] = {PCIE1, PCIE2, CPRI2, CPRI1},
24 [6] = {PCIE1, PCIE2, SGMII_TSEC1, CPRI1},
25 [7] = {PCIE1, PCIE2, SGMII_TSEC1, CPRI1},
26 [8] = {PCIE1, PCIE2, SGMII_TSEC1, CPRI1},
27 [9] = {PCIE1, PCIE2, SGMII_TSEC1, CPRI1},
28 [10] = {PCIE1, PCIE2, SGMII_TSEC1, CPRI1},
[all …]
H A Dmpc8544_serdes.c20 [0x4] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
21 [0x5] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
22 [0x6] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
23 [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
H A Dt4240_serdes.c212 {3, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2} },
213 {4, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2}},
223 PCIE2, PCIE2, PCIE2, PCIE2} },
225 PCIE2, PCIE2, PCIE2, PCIE2}},
227 PCIE2, PCIE2, PCIE2, PCIE2} },
229 PCIE2, PCIE2, PCIE2, PCIE2}},
415 {3, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2} },
416 {4, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2} },
426 PCIE2, PCIE2, PCIE2, PCIE2} },
428 PCIE2, PCIE2, PCIE2, PCIE2} },
[all …]
H A Dp4080_serdes.c17 [0x5] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
20 [0x8] = {PCIE1, PCIE1, PCIE3, PCIE3, PCIE2, PCIE2, PCIE2, PCIE2,
23 [0xd] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, SGMII_FM2_DTSEC3,
26 [0xe] = {PCIE1, PCIE1, PCIE3, PCIE3, PCIE2, PCIE2, SGMII_FM2_DTSEC3,
H A Dt1024_serdes.c14 [0xD5] = {QSGMII_FM1_A, PCIE3, PCIE2, PCIE1},
15 [0xD6] = {QSGMII_FM1_A, PCIE3, PCIE2, SATA1},
16 [0x95] = {XFI_FM1_MAC1, PCIE3, PCIE2, PCIE1},
18 [0x46] = {PCIE1, PCIE1, PCIE2, SATA1},
19 [0x47] = {PCIE1, PCIE1, PCIE2, SGMII_FM1_DTSEC1},
20 [0x56] = {PCIE1, PCIE3, PCIE2, SATA1},
28 [0x77] = {PCIE1, SGMII_2500_FM1_DTSEC3, PCIE2, SGMII_FM1_DTSEC1},
32 [0x135] = {AURORA, SGMII_2500_FM1_DTSEC3, PCIE2, PCIE1},
H A Dt2080_serdes.c32 PCIE4, PCIE1, PCIE2, SGMII_FM1_DTSEC6} },
36 SGMII_FM1_DTSEC2, PCIE4, PCIE1, PCIE2, SGMII_FM1_DTSEC6} },
38 SGMII_FM1_DTSEC2, PCIE4, PCIE1, PCIE2, SGMII_FM1_DTSEC6} },
166 {0x1F, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2} },
167 {0x16, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, SATA1, SATA2} },
172 {0x15, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, SATA1, SATA2} },
H A Dmpc8572_serdes.c18 [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
20 [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE3, PCIE3},
H A Dp1023_serdes.c18 [0x00] = {PCIE1, PCIE2, NONE, NONE},
19 [0x01] = {PCIE1, PCIE2, PCIE3, NONE},
20 [0x02] = {PCIE1, PCIE2, PCIE3, SGMII_FM1_DTSEC2},
21 [0x03] = {PCIE1, PCIE2, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2},
H A Dmpc8536_serdes.c60 [0x5] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
61 [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE3, PCIE3},
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dlx2160a_serdes.c16 {0x01, {PCIE2, PCIE2, PCIE2, PCIE2, PCIE1, PCIE1, PCIE1, PCIE1 } },
17 {0x02, {PCIE2, PCIE2, PCIE2, PCIE2, SGMII6, SGMII5, SGMII4, SGMII3 } },
18 {0x03, {PCIE2, PCIE2, PCIE2, PCIE2, XFI6, XFI5, XFI4,
29 {0x09, {SGMII10, SGMII9, SGMII8, PCIE2, SGMII6, SGMII5, SGMII4,
31 {0x0A, {XFI10, XFI9, XFI8, PCIE2, XFI6, XFI5, XFI4, PCIE1 } },
32 {0x0B, {SGMII10, SGMII9, PCIE2, PCIE2, SGMII6, SGMII5, PCIE1, PCIE1 } },
33 {0x0C, {SGMII10, SGMII9, PCIE2, PCIE2, PCIE1, PCIE1, PCIE1, PCIE1 } },
36 {0x0E, {PCIE2, PCIE2, PCIE2, PCIE2, _100GE1, _100GE1, _100GE1,
38 {0x0F, {PCIE2, PCIE2, PCIE2, PCIE2, _50GE2, _50GE2, _50GE1, _50GE1 } },
39 {0x10, {PCIE2, PCIE2, PCIE2, PCIE2, _25GE6, _25GE5, _50GE1, _50GE1 } },
[all …]
H A Dls2080a_serdes.c16 {0x03, {PCIE2, PCIE2, PCIE2, PCIE2, PCIE1, PCIE1, PCIE1, PCIE1 } },
17 {0x05, {PCIE2, PCIE2, PCIE2, PCIE2, SGMII4, SGMII3, SGMII2, SGMII1 } },
33 {0x33, {PCIE2, PCIE2, PCIE2, PCIE2, QSGMII_D, QSGMII_C, QSGMII_B,
35 {0x35, {QSGMII_D, QSGMII_C, QSGMII_B, PCIE2, XFI4, XFI3, XFI2, XFI1 } },
36 {0x39, {SGMII8, SGMII7, SGMII6, PCIE2, SGMII4, SGMII3, SGMII2,
38 {0x3B, {XFI8, XFI7, XFI6, PCIE2, XFI4, XFI3, XFI2, PCIE1 } },
39 {0x4B, {PCIE2, PCIE2, PCIE2, PCIE2, XFI4, XFI3, XFI2, XFI1 } },
41 {0x4D, {SGMII8, SGMII7, PCIE2, PCIE2, SGMII4, SGMII3, PCIE1, PCIE1 } },
H A Dls1043a_serdes.c17 {0x1555, {XFI_FM1_MAC9, PCIE1, PCIE2, PCIE3} },
18 {0x2555, {SGMII_2500_FM1_DTSEC9, PCIE1, PCIE2, PCIE3} },
19 {0x4555, {QSGMII_FM1_A, PCIE1, PCIE2, PCIE3} },
20 {0x4558, {QSGMII_FM1_A, PCIE1, PCIE2, SATA1} },
21 {0x1355, {XFI_FM1_MAC9, SGMII_FM1_DTSEC2, PCIE2, PCIE3} },
22 {0x2355, {SGMII_2500_FM1_DTSEC9, SGMII_FM1_DTSEC2, PCIE2, PCIE3} },
25 {0x3355, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC2, PCIE2, PCIE3} },
26 {0x3358, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC2, PCIE2, SATA1} },
27 {0x3555, {SGMII_FM1_DTSEC9, PCIE1, PCIE2, PCIE3} },
28 {0x3558, {SGMII_FM1_DTSEC9, PCIE1, PCIE2, SATA1} },
[all …]
H A Dls1046a_serdes.c42 {0x5559, {PCIE1, PCIE2, PCIE3, SATA1} },
43 {0x5577, {PCIE1, PCIE2, PCIE3, PCIE3} },
44 {0x5506, {PCIE1, PCIE2, NONE, PCIE3} },
45 {0x0506, {NONE, PCIE2, NONE, PCIE3} },
46 {0x0559, {NONE, PCIE2, PCIE3, SATA1} },
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dls102xa_serdes.c12 [0x10] = {PCIE1, SATA1, PCIE2, PCIE2},
13 [0x20] = {PCIE1, SGMII_TSEC1, PCIE2, SGMII_TSEC2},
16 [0x50] = {PCIE1, PCIE1, PCIE2, SGMII_TSEC2},
18 [0x70] = {PCIE1, SATA1, PCIE2, SGMII_TSEC2},
19 [0x80] = {PCIE2, PCIE2, PCIE2, PCIE2},
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dmpc8641_serdes.c27 [0x3] = {PCIE2, PCIE2, PCIE2, PCIE2},
34 [0xe] = {PCIE2, PCIE2, PCIE2, PCIE2},
35 [0xf] = {PCIE2, PCIE2, PCIE2, PCIE2},
H A Dmpc8610_serdes.c24 [0x0] = {PCIE2, PCIE2, PCIE2, PCIE2},
25 [0x4] = {PCIE2, PCIE2, PCIE2, PCIE2},
/openbmc/linux/include/linux/bcma/
H A Dbcma_driver_pcie2.h151 #define pcie2_read16(pcie2, offset) bcma_read16((pcie2)->core, offset) argument
152 #define pcie2_read32(pcie2, offset) bcma_read32((pcie2)->core, offset) argument
153 #define pcie2_write16(pcie2, offset, val) bcma_write16((pcie2)->core, offset, val) argument
154 #define pcie2_write32(pcie2, offset, val) bcma_write32((pcie2)->core, offset, val) argument
156 #define pcie2_set32(pcie2, offset, set) bcma_set32((pcie2)->core, offset, set) argument
157 #define pcie2_mask32(pcie2, offset, mask) bcma_mask32((pcie2)->core, offset, mask) argument
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,pcie2-phy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,pcie2-phy.yaml#
7 title: Qualcomm PCIe2 PHY controller
13 The Qualcomm PCIe2 PHY is a Synopsys based phy found in a number of Qualcomm
19 - const: qcom,qcs404-pcie2-phy
20 - const: qcom,pcie2-phy
71 compatible = "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy";

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