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Searched full:pcc0 (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh770x.c30 LCDC, PCC0, PCC1, enumerator
63 INTC_VECT(PCC0, 0x9c0), INTC_VECT(PCC1, 0x9e0),
83 { 0xa400001c, 0, 16, 4, /* IPRF */ { 0, LCDC, PCC0, PCC1, } },
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dimx7ulp-scg-clock.yaml23 M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
H A Dimx7ulp-pcc-clock.yaml23 M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
/openbmc/linux/arch/sh/include/asm/
H A Dhd64461.h194 /* PCC0 Output Pins Control Register */
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-colibri.dtsi375 cam-mclk-pcc0 {
H A Dtegra30-apalis-v1.1.dtsi309 cam-mclk-pcc0 {
H A Dtegra30-apalis.dtsi308 cam-mclk-pcc0 {
H A Dtegra124-apalis-v1.2.dtsi147 cam-mclk-pcc0 {
H A Dtegra124-apalis.dtsi146 cam-mclk-pcc0 {
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra114.c367 PINCTRL_PIN(TEGRA_PIN_CAM_MCLK_PCC0, "CAM_MCLK PCC0"),
H A Dpinctrl-tegra124.c397 PINCTRL_PIN(TEGRA_PIN_CAM_MCLK_PCC0, "CAM_MCLK PCC0"),
H A Dpinctrl-tegra210.c331 PINCTRL_PIN(TEGRA_PIN_HDMI_CEC_PCC0, "HDMI_CEC PCC0"),
H A Dpinctrl-tegra30.c516 PINCTRL_PIN(TEGRA_PIN_CAM_MCLK_PCC0, "CAM_MCLK PCC0"),