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/openbmc/linux/drivers/pinctrl/starfive/
H A Dpinctrl-starfive-jh7100.c124 * 32-bit registers controlling PAD_GPIO[0] to PAD_GPIO[63] followed by
145 * PAD_GPIO pads. This is a global setting.
243 PINCTRL_PIN(PAD_GPIO(0), "GPIO[0]"),
244 PINCTRL_PIN(PAD_GPIO(1), "GPIO[1]"),
245 PINCTRL_PIN(PAD_GPIO(2), "GPIO[2]"),
246 PINCTRL_PIN(PAD_GPIO(3), "GPIO[3]"),
247 PINCTRL_PIN(PAD_GPIO(4), "GPIO[4]"),
248 PINCTRL_PIN(PAD_GPIO(5), "GPIO[5]"),
249 PINCTRL_PIN(PAD_GPIO(6), "GPIO[6]"),
250 PINCTRL_PIN(PAD_GPIO(7), "GPIO[7]"),
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dstarfive,jh7100-pinctrl.yaml12 Out of the SoC's many pins only the ones named PAD_GPIO[0] to PAD_GPIO[63]
22 CMOS Camera interface ------| |--- PAD_GPIO[0]
23 Ethernet PHY interface -----| MUX |--- PAD_GPIO[1]
25 | |--- PAD_GPIO[63]
45 signal group 1 maps the GPIOs to the pins named PAD_GPIO[0] to PAD_GPIO[63].
120 This should be set using either the PAD_GPIO or PAD_FUNC_SHARE
/openbmc/linux/include/dt-bindings/pinctrl/
H A Dpinctrl-starfive-jh7100.h11 #define PAD_GPIO(x) (PAD_GPIO_OFFSET + (x)) macro