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/openbmc/linux/drivers/gpu/drm/ttm/tests/
H A Dttm_pool_test.c251 pt = &pool->caching[caching].orders[order]; in ttm_pool_alloc_order_caching_match()
280 pt_pool = &pool->caching[pool_caching].orders[order]; in ttm_pool_alloc_caching_mismatch()
281 pt_tt = &pool->caching[tt_caching].orders[order]; in ttm_pool_alloc_caching_mismatch()
314 pt_pool = &pool->caching[caching].orders[order]; in ttm_pool_alloc_order_mismatch()
315 pt_tt = &pool->caching[caching].orders[0]; in ttm_pool_alloc_order_mismatch()
355 pt = &pool->caching[caching].orders[order]; in ttm_pool_free_dma_alloc()
386 pt = &pool->caching[caching].orders[order]; in ttm_pool_free_no_dma_alloc()
406 pt = &pool->caching[caching].orders[order]; in ttm_pool_fini_basic()
/openbmc/linux/drivers/dma-buf/heaps/
H A Dsystem_heap.c49 * The selection of the orders used for allocation (1MB, 64K, 4K) is designed
54 static const unsigned int orders[] = {8, 4, 0}; variable
55 #define NUM_ORDERS ARRAY_SIZE(orders)
321 if (size < (PAGE_SIZE << orders[i])) in alloc_largest_available()
323 if (max_order < orders[i]) in alloc_largest_available()
326 page = alloc_pages(order_flags[i], orders[i]); in alloc_largest_available()
342 unsigned int max_order = orders[0]; in system_heap_allocate()
/openbmc/linux/tools/memory-model/Documentation/
H A Dglossary.txt29 a special operation that includes a load and which orders that
117 Fully Ordered: An operation such as smp_mb() that orders all of
120 that orders all of its CPU's prior accesses, itself, and
167 a special operation that includes a store and which orders that
H A Dcheatsheet.txt34 SELF: Orders self, as opposed to accesses before and/or after
35 SV: Orders later accesses to the same variable
H A Drecipes.txt232 The smp_store_release() macro orders any prior accesses against the
233 store, while the smp_load_acquire macro orders the load against any
273 smp_store_release(), but the rcu_dereference() macro orders the load only
310 The smp_wmb() macro orders prior stores against later stores, and the
311 smp_rmb() macro orders prior loads against later loads. Therefore, if
H A Dordering.txt11 1. Barriers (also known as "fences"). A barrier orders some or
67 First, the smp_mb() full memory barrier orders all of the CPU's prior
115 synchronize_srcu() and so on. However, these primitives have orders
/openbmc/linux/arch/s390/kvm/
H A Dsigp.c266 /* handle unknown orders in user space */ in __prepare_sigp_unknown()
280 * SIGP RESTART, SIGP STOP, and SIGP STOP AND STORE STATUS orders in handle_sigp_dst()
283 * interrupt, we need to return any new non-reset orders "busy". in handle_sigp_dst()
298 * their orders, while the guest cannot observe a in handle_sigp_dst()
299 * difference when issuing other orders from two in handle_sigp_dst()
/openbmc/linux/include/drm/ttm/
H A Dttm_pool.h61 * struct ttm_pool - Pool for all caching and orders
77 struct ttm_pool_type orders[NR_PAGE_ORDERS]; member
/openbmc/linux/arch/powerpc/mm/
H A Dmmu_context.c56 * This full barrier orders the store to the cpumask above vs in switch_mm_irqs_off()
69 * radix which orders earlier stores to clear the PTEs before in switch_mm_irqs_off()
/openbmc/linux/drivers/gpu/drm/ttm/
H A Dttm_pool.c291 return &pool->caching[caching].orders[order]; in ttm_pool_select_type()
297 return &pool->caching[caching].orders[order]; in ttm_pool_select_type()
305 return &pool->caching[caching].orders[order]; in ttm_pool_select_type()
578 if (pt != &pool->caching[i].orders[j]) in ttm_pool_init()
604 if (pt != &pool->caching[i].orders[j]) in ttm_pool_fini()
740 ttm_pool_debugfs_orders(pool->caching[i].orders, m); in ttm_pool_debugfs()
/openbmc/linux/Documentation/
H A Datomic_t.txt194 smp_mb__before_atomic() orders all earlier accesses against the RMW op
195 itself and all accesses following it, and smp_mb__after_atomic() orders all
226 a RELEASE because it orders preceding instructions against both the read
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-bayer.rst15 orders. See also `the Wikipedia article on Bayer filter
H A Dfield-order.rst80 If multiple field orders are possible the
81 driver must choose one of the possible field orders during
/openbmc/openbmc/poky/meta/files/common-licenses/
H A DSGI-B-1.158 …orders applicable to dispositions of Covered Code, including without limitation export, re-export,…
H A DSGI-B-1.056 …orders, in connection with any and all dispositions of Covered Code, including but not limited to,…
/openbmc/linux/include/linux/
H A Drefcount.h177 * and thereby orders future stores. See the comment on top.
213 * and thereby orders future stores. See the comment on top.
239 * and thereby orders future stores. See the comment on top.
H A Dihex.h4 * firmware loaded in strange orders rather than a single big blob, but
H A Dcompaction.h77 * as a bigger gap for higher orders than strictly necessary can also in compact_gap()
/openbmc/linux/samples/bpf/
H A Dtc_l2_redirect_user.c59 /* bpf_tunnel_key.remote_ipv4 expects host byte orders */ in main()
/openbmc/phosphor-power/cold-redundancy/
H A Dcold_redundancy.cpp249 std::vector<uint8_t> orders = {}; in createPSU() local
252 orders.push_back(psu->order); in createPSU()
/openbmc/linux/drivers/android/
H A Dbinder_alloc_selftest.c204 /* Generate BUFFER_NUM factorial free orders. */
279 * then free them in all orders possible. Check that pages are
/openbmc/linux/arch/s390/include/uapi/asm/
H A Draw3270.h13 /* Buffer Control Orders */
/openbmc/linux/drivers/s390/block/
H A Ddasd_eckd.h56 /* Define Subsystem Function / Orders */
60 * Perform Subsystem Function / Orders
67 * Perform Subsystem Function / Sub-Orders
/openbmc/qemu/include/migration/
H A Dmisc.h83 * Notifiers may receive events in any of the following orders:
/openbmc/linux/tools/testing/selftests/kvm/aarch64/
H A Dvcpu_width_config.c73 * Each of those three cases, configure vCPUs in two different orders.

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