/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/ |
H A D | mcs_reg.h | 15 u64 offset; \ 17 offset = 0x408ull; \ 19 offset = 0xa28ull; \ 20 offset += (a) * 0x8ull; \ 21 offset; }) 25 u64 offset; \ 27 offset = 0x808ull; \ 29 offset = 0xa68ull; \ 30 offset += (a) * 0x8ull; \ 31 offset; }) [all …]
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/openbmc/linux/drivers/gpu/drm/amd/include/ |
H A D | v11_structs.h | 28 uint32_t shadow_base_lo; // offset: 0 (0x0) 29 uint32_t shadow_base_hi; // offset: 1 (0x1) 30 uint32_t gds_bkup_base_lo; // offset: 2 (0x2) 31 uint32_t gds_bkup_base_hi; // offset: 3 (0x3) 32 uint32_t fw_work_area_base_lo; // offset: 4 (0x4) 33 uint32_t fw_work_area_base_hi; // offset: 5 (0x5) 34 uint32_t shadow_initialized; // offset: 6 (0x6) 35 uint32_t ib_vmid; // offset: 7 (0x7) 36 uint32_t reserved_8; // offset: 8 (0x8) 37 uint32_t reserved_9; // offset: 9 (0x9) [all …]
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H A D | v10_structs.h | 29 uint32_t reserved_0; // offset: 0 (0x0) 30 uint32_t reserved_1; // offset: 1 (0x1) 31 uint32_t reserved_2; // offset: 2 (0x2) 32 uint32_t reserved_3; // offset: 3 (0x3) 33 uint32_t reserved_4; // offset: 4 (0x4) 34 uint32_t reserved_5; // offset: 5 (0x5) 35 uint32_t reserved_6; // offset: 6 (0x6) 36 uint32_t reserved_7; // offset: 7 (0x7) 37 uint32_t reserved_8; // offset: 8 (0x8) 38 uint32_t reserved_9; // offset: 9 (0x9) [all …]
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/openbmc/qemu/tests/qemu-iotests/ |
H A D | 146.out | 29 …, "depth": 0, "present": true, "zero": false, "data": true, "compressed": false, "offset": OFFSET}, 30 …, "depth": 0, "present": true, "zero": false, "data": true, "compressed": false, "offset": OFFSET}, 31 …, "depth": 0, "present": true, "zero": false, "data": true, "compressed": false, "offset": OFFSET}, 32 …, "depth": 0, "present": true, "zero": false, "data": true, "compressed": false, "offset": OFFSET}, 33 …, "depth": 0, "present": true, "zero": false, "data": true, "compressed": false, "offset": OFFSET}, 34 …, "depth": 0, "present": true, "zero": false, "data": true, "compressed": false, "offset": OFFSET}, 35 …, "depth": 0, "present": true, "zero": false, "data": true, "compressed": false, "offset": OFFSET}, 36 …, "depth": 0, "present": true, "zero": false, "data": true, "compressed": false, "offset": OFFSET}, 37 …, "depth": 0, "present": true, "zero": false, "data": true, "compressed": false, "offset": OFFSET}, 38 …, "depth": 0, "present": true, "zero": false, "data": true, "compressed": false, "offset": OFFSET}, [all …]
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H A D | 013.out | 5 At offset 0: 7 wrote 4096/4096 bytes at offset 0 9 wrote 4096/4096 bytes at offset 4096 11 wrote 4096/4096 bytes at offset 8192 13 wrote 4096/4096 bytes at offset 12288 15 wrote 4096/4096 bytes at offset 16384 17 wrote 4096/4096 bytes at offset 20480 19 wrote 4096/4096 bytes at offset 24576 21 wrote 4096/4096 bytes at offset 28672 23 wrote 4096/4096 bytes at offset 32768 [all …]
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/openbmc/linux/arch/s390/kernel/ |
H A D | asm-offsets.c | 23 OFFSET(__TASK_stack, task_struct, stack); in main() 24 OFFSET(__TASK_thread, task_struct, thread); in main() 25 OFFSET(__TASK_pid, task_struct, pid); in main() 28 OFFSET(__THREAD_ksp, thread_struct, ksp); in main() 31 OFFSET(__TI_flags, task_struct, thread_info.flags); in main() 34 OFFSET(__PT_PSW, pt_regs, psw); in main() 35 OFFSET(__PT_GPRS, pt_regs, gprs); in main() 36 OFFSET(__PT_R0, pt_regs, gprs[0]); in main() 37 OFFSET(__PT_R1, pt_regs, gprs[1]); in main() 38 OFFSET(__PT_R2, pt_regs, gprs[2]); in main() [all …]
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/openbmc/linux/arch/powerpc/kernel/ |
H A D | asm-offsets.c | 79 OFFSET(THREAD, task_struct, thread); in main() 80 OFFSET(MM, task_struct, mm); in main() 82 OFFSET(TASK_CANARY, task_struct, stack_canary); in main() 84 OFFSET(PACA_CANARY, paca_struct, canary); in main() 89 OFFSET(RTAS_SP, thread_struct, rtas_sp); in main() 92 OFFSET(TASK_STACK, task_struct, stack); in main() 94 OFFSET(TASK_CPU, task_struct, thread_info.cpu); in main() 98 OFFSET(TI_livepatch_sp, thread_info, livepatch_sp); in main() 101 OFFSET(KSP, thread_struct, ksp); in main() 102 OFFSET(PT_REGS, thread_struct, regs); in main() [all …]
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/openbmc/u-boot/arch/x86/include/asm/arch-braswell/fsp/ |
H A D | fsp_vpd.h | 11 u64 signature; /* Offset 0x0020 */ 12 u8 revision; /* Offset 0x0028 */ 13 u8 unused2[7]; /* Offset 0x0029 */ 14 u16 mrc_init_tseg_size; /* Offset 0x0030 */ 15 u16 mrc_init_mmio_size; /* Offset 0x0032 */ 16 u8 mrc_init_spd_addr1; /* Offset 0x0034 */ 17 u8 mrc_init_spd_addr2; /* Offset 0x0035 */ 18 u8 mem_ch0_config; /* Offset 0x0036 */ 19 u8 mem_ch1_config; /* Offset 0x0037 */ 20 u32 memory_spd_ptr; /* Offset 0x0038 */ [all …]
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/openbmc/linux/arch/mips/kernel/ |
H A D | asm-offsets.c | 30 OFFSET(PT_R0, pt_regs, regs[0]); in output_ptreg_defines() 31 OFFSET(PT_R1, pt_regs, regs[1]); in output_ptreg_defines() 32 OFFSET(PT_R2, pt_regs, regs[2]); in output_ptreg_defines() 33 OFFSET(PT_R3, pt_regs, regs[3]); in output_ptreg_defines() 34 OFFSET(PT_R4, pt_regs, regs[4]); in output_ptreg_defines() 35 OFFSET(PT_R5, pt_regs, regs[5]); in output_ptreg_defines() 36 OFFSET(PT_R6, pt_regs, regs[6]); in output_ptreg_defines() 37 OFFSET(PT_R7, pt_regs, regs[7]); in output_ptreg_defines() 38 OFFSET(PT_R8, pt_regs, regs[8]); in output_ptreg_defines() 39 OFFSET(PT_R9, pt_regs, regs[9]); in output_ptreg_defines() [all …]
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/openbmc/u-boot/board/siemens/draco/ |
H A D | mux.c | 22 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ 23 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 28 {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */ 29 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */ 34 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | 36 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | 42 {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ 43 {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ 44 {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */ 45 {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */ [all …]
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/openbmc/linux/arch/riscv/kernel/ |
H A D | asm-offsets.c | 21 OFFSET(TASK_THREAD_RA, task_struct, thread.ra); in asm_offsets() 22 OFFSET(TASK_THREAD_SP, task_struct, thread.sp); in asm_offsets() 23 OFFSET(TASK_THREAD_S0, task_struct, thread.s[0]); in asm_offsets() 24 OFFSET(TASK_THREAD_S1, task_struct, thread.s[1]); in asm_offsets() 25 OFFSET(TASK_THREAD_S2, task_struct, thread.s[2]); in asm_offsets() 26 OFFSET(TASK_THREAD_S3, task_struct, thread.s[3]); in asm_offsets() 27 OFFSET(TASK_THREAD_S4, task_struct, thread.s[4]); in asm_offsets() 28 OFFSET(TASK_THREAD_S5, task_struct, thread.s[5]); in asm_offsets() 29 OFFSET(TASK_THREAD_S6, task_struct, thread.s[6]); in asm_offsets() 30 OFFSET(TASK_THREAD_S7, task_struct, thread.s[7]); in asm_offsets() [all …]
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/openbmc/linux/arch/loongarch/kernel/ |
H A D | asm-offsets.c | 20 OFFSET(PT_R0, pt_regs, regs[0]); in output_ptreg_defines() 21 OFFSET(PT_R1, pt_regs, regs[1]); in output_ptreg_defines() 22 OFFSET(PT_R2, pt_regs, regs[2]); in output_ptreg_defines() 23 OFFSET(PT_R3, pt_regs, regs[3]); in output_ptreg_defines() 24 OFFSET(PT_R4, pt_regs, regs[4]); in output_ptreg_defines() 25 OFFSET(PT_R5, pt_regs, regs[5]); in output_ptreg_defines() 26 OFFSET(PT_R6, pt_regs, regs[6]); in output_ptreg_defines() 27 OFFSET(PT_R7, pt_regs, regs[7]); in output_ptreg_defines() 28 OFFSET(PT_R8, pt_regs, regs[8]); in output_ptreg_defines() 29 OFFSET(PT_R9, pt_regs, regs[9]); in output_ptreg_defines() [all …]
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/openbmc/u-boot/board/siemens/rut/ |
H A D | mux.c | 22 {OFFSET(uart0_rxd), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* UART0_RXD */ 23 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS)}, /* UART0_TXD */ 28 {OFFSET(ddr_resetn), (MODE(0))}, 29 {OFFSET(ddr_csn0), (MODE(0) | PULLUP_EN)}, 30 {OFFSET(ddr_ck), (MODE(0))}, 31 {OFFSET(ddr_nck), (MODE(0))}, 32 {OFFSET(ddr_casn), (MODE(0) | PULLUP_EN)}, 33 {OFFSET(ddr_rasn), (MODE(0) | PULLUP_EN)}, 34 {OFFSET(ddr_wen), (MODE(0) | PULLUP_EN)}, 35 {OFFSET(ddr_ba0), (MODE(0) | PULLUP_EN)}, [all …]
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/openbmc/u-boot/arch/arm/include/asm/arch-am33xx/ |
H A D | cpu.h | 80 unsigned int wkclkstctrl; /* offset 0x00 */ 81 unsigned int wkctrlclkctrl; /* offset 0x04 */ 82 unsigned int wkgpio0clkctrl; /* offset 0x08 */ 83 unsigned int wkl4wkclkctrl; /* offset 0x0c */ 84 unsigned int timer0clkctrl; /* offset 0x10 */ 86 unsigned int idlestdpllmpu; /* offset 0x20 */ 89 unsigned int clkseldpllmpu; /* offset 0x2c */ 91 unsigned int idlestdpllddr; /* offset 0x34 */ 93 unsigned int clkseldpllddr; /* offset 0x40 */ 95 unsigned int clkseldplldisp; /* offset 0x54 */ [all …]
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/openbmc/u-boot/arch/arm/include/asm/arch-tegra/ |
H A D | pmc.h | 12 uint pmc_cntrl; /* _CNTRL_0, offset 00 */ 13 uint pmc_sec_disable; /* _SEC_DISABLE_0, offset 04 */ 14 uint pmc_pmc_swrst; /* _PMC_SWRST_0, offset 08 */ 15 uint pmc_wake_mask; /* _WAKE_MASK_0, offset 0C */ 16 uint pmc_wake_lvl; /* _WAKE_LVL_0, offset 10 */ 17 uint pmc_wake_status; /* _WAKE_STATUS_0, offset 14 */ 18 uint pmc_sw_wake_status; /* _SW_WAKE_STATUS_0, offset 18 */ 19 uint pmc_dpd_pads_oride; /* _DPD_PADS_ORIDE_0, offset 1C */ 20 uint pmc_dpd_sample; /* _DPD_PADS_SAMPLE_0, offset 20 */ 21 uint pmc_dpd_enable; /* _DPD_PADS_ENABLE_0, offset 24 */ [all …]
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/openbmc/u-boot/arch/arm/include/asm/arch-meson/ |
H A D | clock-gx.h | 16 #define SCR 0x2C /* 0x0b offset in data sheet */ 17 #define TIMEOUT_VALUE 0x3c /* 0x0f offset in data sheet */ 19 #define HHI_GP0_PLL_CNTL 0x40 /* 0x10 offset in data sheet */ 20 #define HHI_GP0_PLL_CNTL2 0x44 /* 0x11 offset in data sheet */ 21 #define HHI_GP0_PLL_CNTL3 0x48 /* 0x12 offset in data sheet */ 22 #define HHI_GP0_PLL_CNTL4 0x4c /* 0x13 offset in data sheet */ 23 #define HHI_GP0_PLL_CNTL5 0x50 /* 0x14 offset in data sheet */ 24 #define HHI_GP0_PLL_CNTL1 0x58 /* 0x16 offset in data sheet */ 26 #define HHI_XTAL_DIVN_CNTL 0xbc /* 0x2f offset in data sheet */ 27 #define HHI_TIMER90K 0xec /* 0x3b offset in data sheet */ [all …]
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/openbmc/linux/drivers/clk/meson/ |
H A D | gxbb.h | 17 #define SCR 0x2C /* 0x0b offset in data sheet */ 18 #define TIMEOUT_VALUE 0x3c /* 0x0f offset in data sheet */ 20 #define HHI_GP0_PLL_CNTL 0x40 /* 0x10 offset in data sheet */ 21 #define HHI_GP0_PLL_CNTL2 0x44 /* 0x11 offset in data sheet */ 22 #define HHI_GP0_PLL_CNTL3 0x48 /* 0x12 offset in data sheet */ 23 #define HHI_GP0_PLL_CNTL4 0x4c /* 0x13 offset in data sheet */ 24 #define HHI_GP0_PLL_CNTL5 0x50 /* 0x14 offset in data sheet */ 25 #define HHI_GP0_PLL_CNTL1 0x58 /* 0x16 offset in data sheet */ 27 #define HHI_XTAL_DIVN_CNTL 0xbc /* 0x2f offset in data sheet */ 28 #define HHI_TIMER90K 0xec /* 0x3b offset in data sheet */ [all …]
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/openbmc/linux/include/video/ |
H A D | mach64.h | 20 #define CRTC_H_TOTAL_DISP 0x0000 /* Dword offset 0_00 */ 21 #define CRTC2_H_TOTAL_DISP 0x0000 /* Dword offset 0_00 */ 22 #define CRTC_H_SYNC_STRT_WID 0x0004 /* Dword offset 0_01 */ 23 #define CRTC2_H_SYNC_STRT_WID 0x0004 /* Dword offset 0_01 */ 30 #define CRTC_V_TOTAL_DISP 0x0008 /* Dword offset 0_02 */ 31 #define CRTC2_V_TOTAL_DISP 0x0008 /* Dword offset 0_02 */ 36 #define CRTC_V_SYNC_STRT_WID 0x000C /* Dword offset 0_03 */ 37 #define CRTC2_V_SYNC_STRT_WID 0x000C /* Dword offset 0_03 */ 42 #define CRTC_VLINE_CRNT_VLINE 0x0010 /* Dword offset 0_04 */ 43 #define CRTC2_VLINE_CRNT_VLINE 0x0010 /* Dword offset 0_04 */ [all …]
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/openbmc/linux/drivers/net/ethernet/microchip/vcap/ |
H A D | vcap_model_kunit.c | 20 .offset = 0, 25 .offset = 2, 30 .offset = 3, 35 .offset = 10, 40 .offset = 13, 45 .offset = 16, 50 .offset = 19, 55 .offset = 20, 60 .offset = 32, 65 .offset = 35, [all …]
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/openbmc/linux/drivers/net/ethernet/microchip/sparx5/ |
H A D | sparx5_vcap_ag_api.c | 20 .offset = 0, 25 .offset = 1, 30 .offset = 2, 35 .offset = 4, 40 .offset = 16, 45 .offset = 18, 50 .offset = 83, 55 .offset = 84, 60 .offset = 85, 65 .offset = 88, [all …]
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/openbmc/u-boot/arch/x86/include/asm/arch-baytrail/fsp/ |
H A D | fsp_vpd.h | 31 uint64_t signature; /* Offset 0x0000 */ 32 uint8_t reserved0[24]; /* Offset 0x0008 */ 33 uint16_t mrc_init_tseg_size; /* Offset 0x0020 */ 34 uint16_t mrc_init_mmio_size; /* Offset 0x0022 */ 35 uint8_t mrc_init_spd_addr1; /* Offset 0x0024 */ 36 uint8_t mrc_init_spd_addr2; /* Offset 0x0025 */ 37 uint8_t emmc_boot_mode; /* Offset 0x0026 */ 38 uint8_t enable_sdio; /* Offset 0x0027 */ 39 uint8_t enable_sdcard; /* Offset 0x0028 */ 40 uint8_t enable_hsuart0; /* Offset 0x0029 */ [all …]
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/openbmc/openbmc/meta-ieisystem/meta-fp5280g3/recipes-phosphor/configuration/fp5280g3-yaml-config/ |
H A D | fp5280g3-ipmi-inventory-sensors.yaml | 5 offset: 0 10 offset: 0 15 offset: 0 20 offset: 0 25 offset: 8 30 offset: 0 35 offset: 0 40 offset: 0 45 offset: 0 50 offset: 0 [all …]
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/openbmc/u-boot/arch/arm/include/asm/arch-tegra124/ |
H A D | mc.h | 13 u32 reserved0[4]; /* offset 0x00 - 0x0C */ 14 u32 mc_smmu_config; /* offset 0x10 */ 15 u32 mc_smmu_tlb_config; /* offset 0x14 */ 16 u32 mc_smmu_ptc_config; /* offset 0x18 */ 17 u32 mc_smmu_ptb_asid; /* offset 0x1C */ 18 u32 mc_smmu_ptb_data; /* offset 0x20 */ 19 u32 reserved1[3]; /* offset 0x24 - 0x2C */ 20 u32 mc_smmu_tlb_flush; /* offset 0x30 */ 21 u32 mc_smmu_ptc_flush; /* offset 0x34 */ 22 u32 reserved2[6]; /* offset 0x38 - 0x4C */ [all …]
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/openbmc/u-boot/arch/arm/include/asm/arch-tegra210/ |
H A D | mc.h | 13 u32 reserved0[4]; /* offset 0x00 - 0x0C */ 14 u32 mc_smmu_config; /* offset 0x10 */ 15 u32 mc_smmu_tlb_config; /* offset 0x14 */ 16 u32 mc_smmu_ptc_config; /* offset 0x18 */ 17 u32 mc_smmu_ptb_asid; /* offset 0x1C */ 18 u32 mc_smmu_ptb_data; /* offset 0x20 */ 19 u32 reserved1[3]; /* offset 0x24 - 0x2C */ 20 u32 mc_smmu_tlb_flush; /* offset 0x30 */ 21 u32 mc_smmu_ptc_flush; /* offset 0x34 */ 22 u32 reserved2[6]; /* offset 0x38 - 0x4C */ [all …]
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/openbmc/linux/arch/x86/kernel/ |
H A D | asm-offsets.c | 37 OFFSET(TASK_threadsp, task_struct, thread.sp); in common() 39 OFFSET(TASK_stack_canary, task_struct, stack_canary); in common() 43 OFFSET(pbe_address, pbe, address); in common() 44 OFFSET(pbe_orig_address, pbe, orig_address); in common() 45 OFFSET(pbe_next, pbe, next); in common() 49 OFFSET(IA32_SIGCONTEXT_ax, sigcontext_32, ax); in common() 50 OFFSET(IA32_SIGCONTEXT_bx, sigcontext_32, bx); in common() 51 OFFSET(IA32_SIGCONTEXT_cx, sigcontext_32, cx); in common() 52 OFFSET(IA32_SIGCONTEXT_dx, sigcontext_32, dx); in common() 53 OFFSET(IA32_SIGCONTEXT_si, sigcontext_32, si); in common() [all …]
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