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/openbmc/linux/drivers/mtd/nand/raw/
H A Dnand_onfi.c12 * This file contains all ONFI helpers.
53 * Use the Change Read Column command to skip the ONFI param pages and in nand_flash_detect_ext_param_page()
71 * Do not strictly follow the ONFI spec, maybe changed in future. in nand_flash_detect_ext_param_page()
142 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
150 struct onfi_params *onfi; in nand_onfi_detect() local
159 /* Try ONFI for unknown chip or LP */ in nand_onfi_detect()
161 if (ret || strncmp(id, "ONFI", 4)) in nand_onfi_detect()
164 /* ONFI chip: allocate a buffer to hold its parameter page */ in nand_onfi_detect()
202 pr_warn("Could not find a valid ONFI parameter page, trying bit-wise majority to recover it\n"); in nand_onfi_detect()
208 pr_err("ONFI parameter recovery failed, aborting\n"); in nand_onfi_detect()
[all …]
H A Dnand_timings.c16 * For non-ONFI chips we use the highest possible value for tPROG and tBERS.
17 * tR and tCCS will take the default values precised in the ONFI specification
20 * These four values are tweaked to be more accurate in the case of ONFI chips.
557 * onfi_find_closest_sdr_mode - Derive the closest ONFI SDR timing mode given a
604 * onfi_find_closest_nvddr_mode - Derive the closest ONFI NVDDR timing mode
647 * given ONFI mode
650 * @timing_mode: The ONFI timing mode
656 struct onfi_params *onfi = chip->parameters.onfi; in onfi_fill_sdr_interface_config() local
666 * These information are part of the ONFI parameter page. in onfi_fill_sdr_interface_config()
668 if (onfi) { in onfi_fill_sdr_interface_config()
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H A Dnand_micron.c77 * Configure chip properties from Micron vendor-specific ONFI table
83 if (p->onfi) { in micron_nand_onfi_init()
84 struct nand_onfi_vendor_micron *micron = (void *)p->onfi->vendor; in micron_nand_onfi_init()
421 if (!chip->parameters.onfi) in micron_supports_on_die_ecc()
588 * revision number field of the ONFI parameter page. Assume ONFI in micron_fixup_onfi_param_page()
H A Dinternals.h44 * @fixup_onfi_param_page: apply vendor specific fixups to the ONFI parameter
168 /* ONFI functions */
H A Dnand_legacy.c92 * a byte. The ONFi spec (Revision 3.1; 2012-09-19, Section 2.16) reads: in nand_write_byte16()
322 /* EZ-NAND can take upto 250ms as per ONFi v4.0 */ in nand_command()
462 /* EZ-NAND can take upto 250ms as per ONFi v4.0 */ in nand_command_lp()
H A Dnand_macronix.c110 if (!p->onfi) in macronix_nand_onfi_init()
115 mxic = (struct nand_onfi_vendor_macronix *)p->onfi->vendor; in macronix_nand_onfi_init()
H A Dnand_jedec.c12 * This file contains all ONFI helpers.
/openbmc/linux/include/linux/mtd/
H A Donfi.h7 * Contains all ONFI related definitions
16 /* ONFI version bits */
27 /* ONFI features */
32 /* ONFI timing mode, used in both asynchronous and synchronous mode */
45 /* ONFI feature number/address */
54 /* ONFI subfeature parameters length */
57 /* ONFI optional commands SET/GET FEATURES supported? */
69 __le16 ext_param_page_length; /* since ONFI 2.1 */
70 u8 num_of_param_pages; /* since ONFI 2.1 */
130 /* Extended ECC information Block Definition (since ONFI 2.1) */
[all …]
H A Drawnand.h21 #include <linux/mtd/onfi.h>
160 * Autodetect nand buswidth with readid/onfi.
231 * @onfi: ONFI specific parameters
241 /* ONFI parameters */
242 struct onfi_params *onfi; member
392 * meaning are described in the ONFI specifications:
393 * https://media-www.micron.com/-/media/client/onfi/specs/onfi_3_1_spec.pdf
484 * meaning are described in the ONFI specifications:
485 * https://media-www.micron.com/-/media/client/onfi/specs/onfi_4_1_gold.pdf
692 * Please note that "in" and "out" are inverted from the ONFI specification
/openbmc/u-boot/arch/arm/mach-uniphier/boot-device/
H A Dboot-device-ld4.c32 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
33 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
34 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
35 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, ONFI, Addr 5)"},
36 {BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, ONFI, Addr 5)"},
37 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
38 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
39 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, ONFI, Addr 5)"},
H A Dboot-device-pro5.c31 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
32 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
33 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"},
34 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"},
35 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
36 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
37 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
38 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
H A Dboot-device-pxs2.c31 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
32 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
33 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
34 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
36 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
37 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
38 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"},
39 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"},
H A Dboot-device-ld11.c31 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
32 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
33 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
34 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
35 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI Addr 4)"},
36 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI Addr 4)"},
37 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI Addr 5)"},
38 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI Addr 5)"},
H A Dboot-device-pxs3.c22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
23 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
30 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5, BBM Last Page)"},
31 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5, BBM Last Page)"},
/openbmc/u-boot/include/linux/mtd/
H A Drawnand.h240 * Autodetect nand buswidth with readid/onfi.
263 /* ONFI features */
267 /* ONFI timing mode, used in both asynchronous and synchronous mode */
276 /* ONFI feature address */
282 /* ONFI subfeature parameters length */
285 /* ONFI optional commands SET/GET FEATURES supported? */
296 __le16 ext_param_page_length; /* since ONFI 2.1 */
297 u8 num_of_param_pages; /* since ONFI 2.1 */
356 /* Extended ECC information Block Definition (since ONFI 2.1) */
375 /* Extended Parameter Page Definition (since ONFI 2.1) */
[all …]
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dnand_timings.c272 * timings according to the given ONFI timing mode
273 * @mode: ONFI timing mode
286 * given ONFI mode
288 * @mode: The ONFI timing mode
306 * These information are part of the ONFI parameter page. in onfi_init_data_interface()
H A DKconfig291 determined by reading ONFI params.
293 be determined from on-chip ONFI params, like in following scenarios:
294 - SPL boot does not support reading of ONFI parameters. This is done to
298 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
H A Dmxs_nand_spl.c54 /* Trying to detect the NAND flash using ONFi, JEDEC, and (extended) IDs */
73 /* Trying to detect the NAND flash using ONFi only */
102 /* read ONFI */ in mxs_flash_onfi_ident()
110 /* we have ONFI, probe it */ in mxs_flash_onfi_ident()
H A Datmel_nand.c683 * pmecc_choose_ecc - Get ecc requirement from ONFI parameters. If
685 * ONFI ECC parameters.
687 * if host->pmecc_corr_cap is 0 then set it as the ONFI ecc_bits.
688 * if host->pmecc_sector_size is 0 then set it as the ONFI sector_size.
690 * @cap: store the ONFI ECC correct bits capbility
691 * @sector_size: in how many bytes that ONFI require to correct @ecc_bits
699 /* Get ECC requirement from ONFI parameters */ in pmecc_choose_ecc()
704 pr_debug("ONFI params, minimum required ECC: %d bits in %d bytes\n", in pmecc_choose_ecc()
709 /* Non-ONFI compliant */ in pmecc_choose_ecc()
710 dev_info(host->dev, "NAND chip is not ONFI compliant, assume ecc_bits is 2 in 512 bytes\n"); in pmecc_choose_ecc()
[all …]
H A Dnand_base.c229 * a byte. The ONFi spec (Revision 3.1; 2012-09-19, Section 2.16) reads: in nand_write_byte16()
667 /* EZ-NAND can take upto 250ms as per ONFi v4.0 */ in nand_command()
765 /* EZ-NAND can take upto 250ms as per ONFi v4.0 */ in nand_command_lp()
909 * Reset the Data interface and timings to ONFI mode 0.
923 * The ONFI specification says: in nand_reset_data_interface()
951 * First tries to retrieve supported timing modes from ONFI information,
952 * and if the NAND chip does not support ONFI, relies on the
992 * First tries to retrieve supported timing modes from ONFI information,
993 * and if the NAND chip does not support ONFI, relies on the
1009 * First try to identify the best timings from ONFI parameters and in nand_init_data_interface()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Darasan,nand-controller.yaml7 title: Arasan NAND Flash Controller with ONFI 3.1 support
H A Dgpmi-nand.yaml68 flash (e.g., according to the ONFI standard). However, note that
/openbmc/linux/arch/sh/include/cpu-sh4/cpu/
H A Dsh7757.h116 /* PTB (mobule: INTC, ONFI, TMU) */
247 /* PTZ (mobule: eMMC, ONFI) */
/openbmc/u-boot/include/configs/
H A Dls2080a_simu.h89 /* ONFI NAND Flash mode0 Timing Params */
/openbmc/u-boot/doc/
H A DREADME.nand179 Enables detection of ONFI compliant devices during probe.
181 ONFI parameter page.

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