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/openbmc/linux/arch/m68k/fpsp040/
H A Ddo_func.S8 | tbldo.sa. Cases of zero, infinity and NaN are handled in
56 QNAN: .long 0x7fff0000,0xffffffff,0xffffffff |non-signaling nan
256 .long smod_oper | 00,01 norm,zero = nan with operr
258 .long smod_snan | 00,11 norm,nan = nan
260 .long smod_oper | 01,01 zero,zero = nan with operr
262 .long smod_snan | 01,11 zero,nan = nan
263 .long smod_oper | 10,00 inf,norm = nan with operr
264 .long smod_oper | 10,01 inf,zero = nan with operr
265 .long smod_oper | 10,10 inf,inf = nan with operr
266 .long smod_snan | 10,11 inf,nan = nan
[all …]
H A Dkernel_ex.S26 nan: .long 0x7fff0000,0xffffffff,0xffffffff label
107 | nan bit; Store default NAN into fp0
116 orl #opnan_mask,USER_FPSR(%a6) |set NaN, OPERR, AIOP
121 fmovemx nan,%fp0-%fp0 |load default nan
281 | Determine if the destination nan is signalling or non-signalling,
286 btstb #sign_bit,FPTEMP_EX(%a6) |test sign of nan
294 fmovex FPTEMP(%a6),%fp0 |return the non-signalling nan
296 | Check the source nan. If it is signalling, snan will be reported.
304 orl #snaniop_mask,USER_FPSR(%a6) |set NAN, SNAN, AIOP
312 orb #nan_tag,DTAG(%a6) |set up dtag for nan
[all …]
H A Dtbldo.S61 .long src_nan |$01-3 fint nan
70 .long src_nan |$02-3 fsinh nan
79 .long src_nan |$03-3 fintrz nan
106 .long src_nan |$06-3 flognp1 nan
124 .long src_nan |$08-3 fetoxm1 nan
133 .long src_nan |$09-3 ftanh nan
142 .long src_nan |$0a-3 fatan nan
160 .long src_nan |$0c-3 fasin nan
169 .long src_nan |$0d-3 fatanh nan
178 .long src_nan |$0e-3 fsin nan
[all …]
H A Dx_snan.S4 | fpsp_snan --- FPSP handler for signalling NAN exception
10 | If the dest data format is s, d, or x, then the SNAN bit in the NAN
11 | is set to one and the resulting non-signaling NAN (truncated if
167 | Set signalling nan bit
189 | Set signalling nan bit
211 | Set signalling nan bit
252 | Check if it is a src nan or dst nan
258 cmpib #3,%d0 |check for nan in destination
259 bnes issrc |destination nan has priority
261 btstb #6,FPTEMP_HI(%a6) |check if dest nan is an snan
/openbmc/qemu/tests/tcg/arm/
H A Dfloat_madds.ref2 op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
3 res: f32(-nan:0xffe00000) flags=INVALID (0/0)
4 op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-nan:0xffa00000)
5 res: f32(-nan:0xffe00000) flags=INVALID (0/1)
6 op : f32(-inf:0xff800000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
7 res: f32(-nan:0xffe00000) flags=INVALID (0/2)
8 op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
9 res: f32(-nan:0xffc00000) flags=OK (1/0)
10 op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-nan:0xffc00000)
11 res: f32(-nan:0xffc00000) flags=OK (1/1)
[all …]
H A Dfcvt.ref4 00 SINGLE: -nan / 0xffa00000 (0 => OK)
6 01 SINGLE: -nan / 0xffc00000 (0 => OK)
62 29 SINGLE: nan / 0x7fc00000 (0 => OK)
64 30 SINGLE: nan / 0x7fa00000 (0 => OK)
67 00 SINGLE: -nan / 0xffa00000 (0 => OK)
68 00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 => INVALID)
69 01 SINGLE: -nan / 0xffc00000 (0 => OK)
70 01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
125 29 SINGLE: nan / 0x7fc00000 (0 => OK)
126 29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
[all …]
/openbmc/qemu/tests/tcg/loongarch64/
H A Dfloat_madds.ref2 op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
3 res: f32(-nan:0xffe00000) flags=INVALID (0/0)
4 op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-nan:0xffa00000)
5 res: f32(-nan:0xffe00000) flags=INVALID (0/1)
6 op : f32(-inf:0xff800000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
7 res: f32(-nan:0xffe00000) flags=INVALID (0/2)
8 op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
9 res: f32(-nan:0xffc00000) flags=OK (1/0)
10 op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-nan:0xffc00000)
11 res: f32(-nan:0xffc00000) flags=OK (1/1)
[all …]
H A Dfloat_convs.ref2 from single: f32(-nan:0xffa00000)
3 to double: f64(-nan:0x00fffc000000000000) (INVALID)
8 from single: f32(-nan:0xffc00000)
9 to double: f64(-nan:0x00fff8000000000000) (OK)
176 from single: f32(nan:0x7fc00000)
177 to double: f64(nan:0x007ff8000000000000) (OK)
182 from single: f32(nan:0x7fa00000)
183 to double: f64(nan:0x007ffc000000000000) (INVALID)
189 from single: f32(-nan:0xffa00000)
190 to double: f64(-nan:0x00fffc000000000000) (INVALID)
[all …]
/openbmc/qemu/tests/tcg/aarch64/
H A Dfloat_madds.ref2 op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
3 res: f32(-nan:0xffe00000) flags=INVALID (0/0)
4 op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-nan:0xffa00000)
5 res: f32(-nan:0xffe00000) flags=INVALID (0/1)
6 op : f32(-inf:0xff800000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
7 res: f32(-nan:0xffe00000) flags=INVALID (0/2)
8 op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
9 res: f32(-nan:0xffc00000) flags=OK (1/0)
10 op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-nan:0xffc00000)
11 res: f32(-nan:0xffc00000) flags=OK (1/1)
[all …]
H A Dfcvt.ref4 00 SINGLE: -nan / 0xffa00000 (0 => OK)
6 01 SINGLE: -nan / 0xffc00000 (0 => OK)
62 29 SINGLE: nan / 0x7fc00000 (0 => OK)
64 30 SINGLE: nan / 0x7fa00000 (0 => OK)
67 00 SINGLE: -nan / 0xffa00000 (0 => OK)
68 00 DOUBLE: -nan / 0x00fffc000000000000 (0x1 => INVALID)
69 01 SINGLE: -nan / 0xffc00000 (0 => OK)
70 01 DOUBLE: -nan / 0x00fff8000000000000 (0 => OK)
125 29 SINGLE: nan / 0x7fc00000 (0 => OK)
126 29 DOUBLE: nan / 0x007ff8000000000000 (0 => OK)
[all …]
H A Dfloat_convs.ref2 from single: f32(-nan:0xffa00000)
3 to double: f64(-nan:0x00fffc000000000000) (INVALID)
8 from single: f32(-nan:0xffc00000)
9 to double: f64(-nan:0x00fff8000000000000) (OK)
176 from single: f32(nan:0x7fc00000)
177 to double: f64(nan:0x007ff8000000000000) (OK)
182 from single: f32(nan:0x7fa00000)
183 to double: f64(nan:0x007ffc000000000000) (INVALID)
189 from single: f32(-nan:0xffa00000)
190 to double: f64(-nan:0x00fffc000000000000) (INVALID)
[all …]
/openbmc/qemu/tests/tcg/hexagon/
H A Dfloat_madds.ref2 op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
3 res: f32(-nan:0xffffffff) flags=INVALID (0/0)
4 op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-nan:0xffa00000)
5 res: f32(-nan:0xffffffff) flags=INVALID (0/1)
6 op : f32(-inf:0xff800000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
7 res: f32(-nan:0xffffffff) flags=INVALID (0/2)
8 op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
9 res: f32(-nan:0xffffffff) flags=OK (1/0)
10 op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-nan:0xffc00000)
11 res: f32(-nan:0xffffffff) flags=OK (1/1)
[all …]
H A Dfloat_convs.ref2 from single: f32(-nan:0xffa00000)
3 to double: f64(-nan:0x00ffffffffffffffff) (INVALID)
8 from single: f32(-nan:0xffc00000)
9 to double: f64(-nan:0x00ffffffffffffffff) (OK)
176 from single: f32(-nan:0x7fc00000)
177 to double: f64(-nan:0x00ffffffffffffffff) (OK)
182 from single: f32(-nan:0x7fa00000)
183 to double: f64(-nan:0x00ffffffffffffffff) (INVALID)
189 from single: f32(-nan:0xffa00000)
190 to double: f64(-nan:0x00ffffffffffffffff) (INVALID)
[all …]
/openbmc/qemu/tests/tcg/ppc64le/
H A Dfloat_madds.ref2 op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
3 res: f32(-nan:0xffe00000) flags=INVALID (0/0)
4 op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-nan:0xffa00000)
5 res: f32(-nan:0xffc00000) flags=INVALID (0/1)
6 op : f32(-inf:0xff800000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
7 res: f32(-nan:0xffc00000) flags=INVALID (0/2)
8 op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
9 res: f32(-nan:0xffc00000) flags=OK (1/0)
10 op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-nan:0xffc00000)
11 res: f32(-nan:0xffc00000) flags=OK (1/1)
[all …]
H A Dfloat_convs.ref2 from single: f32(-nan:0xffa00000)
3 to double: f64(-nan:0x00fff4000000000000) (OK)
8 from single: f32(-nan:0xffc00000)
9 to double: f64(-nan:0x00fff8000000000000) (OK)
176 from single: f32(nan:0x7fc00000)
177 to double: f64(nan:0x007ff8000000000000) (OK)
182 from single: f32(nan:0x7fa00000)
183 to double: f64(nan:0x007ff4000000000000) (OK)
189 from single: f32(-nan:0xffa00000)
190 to double: f64(-nan:0x00fff4000000000000) (OK)
[all …]
/openbmc/qemu/tests/tcg/multiarch/libs/
H A Dfloat_helpers.c37 0xffff, /* -NaN / AHP -Max */
38 0xfcff, /* -NaN / AHP */
39 0xfc01, /* -NaN / AHP */
51 0x7c01, /* NaN / AHP */
52 0x7cff, /* NaN / AHP */
53 0x7fff, /* NaN / AHP +Max*/
81 /* Signaling NaN macros, if supported. */
89 -NAN,
116 NAN,
149 {-NAN},
[all …]
/openbmc/u-boot/post/lib_powerpc/fpu/
H A Dcompare-fp-1.c34 static float NaN; variable
124 NaN = __builtin_nan (""); in fpu_post_test_math6()
127 iuneq (NaN, NaN, 1); in fpu_post_test_math6()
138 iltgt (NaN, NaN, 0); in fpu_post_test_math6()
148 iunlt (NaN, ninf, 1); in fpu_post_test_math6()
149 iunlt (pinf, NaN, 1); in fpu_post_test_math6()
161 iunle (NaN, ninf, 1); in fpu_post_test_math6()
162 iunle (pinf, NaN, 1); in fpu_post_test_math6()
174 iungt (NaN, ninf, 1); in fpu_post_test_math6()
175 iungt (pinf, NaN, 1); in fpu_post_test_math6()
[all …]
/openbmc/linux/arch/parisc/math-emu/
H A Dfcnvff.c54 * Test for NaN or infinity in sgl_to_dbl_fcnvff()
58 * determine if NaN or infinity in sgl_to_dbl_fcnvff()
70 * is NaN; signaling or quiet? in sgl_to_dbl_fcnvff()
76 /* make NaN quiet */ in sgl_to_dbl_fcnvff()
83 * NaN is quiet, return as double NaN in sgl_to_dbl_fcnvff()
144 * Test for NaN or infinity in dbl_to_sgl_fcnvff()
148 * determine if NaN or infinity in dbl_to_sgl_fcnvff()
159 * is NaN; signaling or quiet? in dbl_to_sgl_fcnvff()
166 /* make NaN quiet */ in dbl_to_sgl_fcnvff()
171 * NaN is quiet, return as single NaN in dbl_to_sgl_fcnvff()
H A Dsfrem.c48 * check first operand for NaN's or infinity in sgl_frem()
64 * is NaN; signaling or quiet? in sgl_frem()
70 /* make NaN quiet */ in sgl_frem()
75 * is second operand a signaling NaN? in sgl_frem()
81 /* make NaN quiet */ in sgl_frem()
88 * return quiet NaN in sgl_frem()
95 * check second operand for NaN's or infinity in sgl_frem()
106 * is NaN; signaling or quiet? in sgl_frem()
111 /* make NaN quiet */ in sgl_frem()
116 * return quiet NaN in sgl_frem()
H A Dfmpyfadd.c80 * check first operand for NaN's or infinity in dbl_fmpyfadd()
126 * is NaN; signaling or quiet? in dbl_fmpyfadd()
132 /* make NaN quiet */ in dbl_fmpyfadd()
137 * is second operand a signaling NaN? in dbl_fmpyfadd()
143 /* make NaN quiet */ in dbl_fmpyfadd()
150 * is third operand a signaling NaN? in dbl_fmpyfadd()
156 /* make NaN quiet */ in dbl_fmpyfadd()
163 * return quiet NaN in dbl_fmpyfadd()
171 * check second operand for NaN's or infinity in dbl_fmpyfadd()
217 * is NaN; signaling or quiet? in dbl_fmpyfadd()
[all …]
H A Ddfrem.c49 * check first operand for NaN's or infinity in dbl_frem()
65 * is NaN; signaling or quiet? in dbl_frem()
71 /* make NaN quiet */ in dbl_frem()
76 * is second operand a signaling NaN? in dbl_frem()
82 /* make NaN quiet */ in dbl_frem()
89 * return quiet NaN in dbl_frem()
96 * check second operand for NaN's or infinity in dbl_frem()
107 * is NaN; signaling or quiet? in dbl_frem()
112 /* make NaN quiet */ in dbl_frem()
117 * return quiet NaN in dbl_frem()
/openbmc/qemu/fpu/
H A Dsoftfloat-specialize.c.inc115 | if the fraction represents a signalling NaN; otherwise false.
129 | The pattern for a default generated deconstructed floating-point NaN.
194 | Returns a quiet NaN from a signalling NaN for the deconstructed
225 | The pattern for a default generated extended double-precision NaN.
260 | NaN; otherwise returns 0.
280 | NaN; otherwise returns 0.
299 | NaN; otherwise returns 0.
318 | NaN; otherwise returns 0.
337 | NaN; otherwise returns 0.
356 | NaN; otherwise returns 0.
[all …]
/openbmc/linux/arch/arm/nwfpe/
H A Dsoftfloat-specialize61 Internal canonical NaN format.
71 The pattern for a default generated single-precision NaN.
78 Returns 1 if the single-precision floating-point value `a' is a NaN;
92 NaN; otherwise returns 0.
104 Returns the result of converting the single-precision floating-point NaN
105 `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
123 Returns the result of converting the canonical NaN `a' to the single-
137 is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
138 signaling NaN, the invalid exception is raised.
163 The pattern for a default generated double-precision NaN.
[all …]
/openbmc/qemu/include/fpu/
H A Dsoftfloat-types.h160 float_flag_invalid_cvti = 0x1000, /* non-nan to integer */
174 * 2-input NaN propagation rule. Individual architectures have
175 * different rules for which input NaN is propagated to the output
176 * when there is more than one NaN on the input.
179 * NaN propagation rule, because the softfloat code guarantees
180 * not to try to pick a NaN to propagate in default NaN mode.
181 * When not in default-NaN mode, it is an error for the target
183 * we need to handle an input NaN and no rule was selected.
197 * This implements x87 NaN propagation rules:
201 * SNaN and a non-NaN => return the SNaN, silenced
[all …]
/openbmc/linux/arch/mips/math-emu/
H A Dsp_sqrt.c18 /* take care of Inf and NaN */ in ieee754sp_sqrt()
24 /* x == INF or NAN? */ in ieee754sp_sqrt()
30 /* sqrt(Nan) = Nan */ in ieee754sp_sqrt()
39 /* sqrt(-Inf) = Nan */ in ieee754sp_sqrt()
49 /* sqrt(-x) = Nan */ in ieee754sp_sqrt()

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