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/openbmc/openpower-proc-control/
H A Dnmi_interface.hpp5 #include <xyz/openbmc_project/Control/Host/NMI/server.hpp>
12 using Base = sdbusplus::xyz::openbmc_project::Control::Host::server::NMI;
15 /* @class NMI
16 * @brief Implementation of NMI (Soft Reset)
18 class NMI : public Interface class
21 NMI() = delete;
22 NMI(const NMI&) = delete;
23 NMI& operator=(const NMI&) = delete;
24 NMI(NMI&&) = delete;
25 NMI& operator=(NMI&&) = delete;
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H A Dnmi_main.cpp25 constexpr auto BUSPATH_NMI = "/xyz/openbmc_project/control/host0/nmi"; in main()
26 constexpr auto BUSNAME_NMI = "xyz.openbmc_project.Control.Host.NMI"; in main()
33 openpower::proc::NMI NMI(bus, BUSPATH_NMI); in main() local
H A Dnmi_interface.cpp34 NMI::NMI(sdbusplus::bus_t& bus, const char* path) : in NMI() function in openpower::proc::NMI
38 void NMI::nmi() in nmi() function in openpower::proc::NMI
/openbmc/docs/designs/
H A Dnmi-dbus-interface.md1 # Design proposal for issuing NMI on servers that use OpenBMC
23 Whenever the host is unresponsive/running, Admin needs to trigger an NMI event
29 This proposal aims to trigger NMI, which in turn will invoke an
38 NMI.interface.yaml) and implement the new D-Bus back-end for respective
43 Enable NMI D-Bus phosphor interface and support this via Redfish
51 An NMI type
52 - Nmi: Generate a Diagnostic Interrupt (usually an NMI on x86 systems) to
62 {"Action":"ComputerSystem.Reset","ResetType":"Nmi"} to trigger NMI.
63 3. Redfish URI will invoke a D-Bus NMI back-end call which will use an arch
64 specific back-end implementation of xyz.openbmc_project.Control.Host.NMI to
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Chassis/Buttons/
H A DNMI.interface.yaml2 NMI button is a Diagnostic Interrupt(Front Panel NMI).Diagnostic interrupt
5 connected to the BMC through a front panel connector. user can press NMI
6 button on the front panel and then trigger NMI signal.
10 Emulate NMI button press.
20 Enable/disable NMI button. false means NMI button is disabled true
21 means NMI button is enabled
29 NMI button released signal
32 NMI button pressed signal
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Chassis/Control/
H A DNMISource.interface.yaml2 An interface for NMI signal source.
8 Keeps track of NMI signal source in BMC.
13 whether the BMC enables NMI event.
19 The type of NMI source.
23 NONE NMI signal.
26 Via Front Panel NMI button.
41 Via southbridge NMI.
44 Via chipset NMI.
/openbmc/phosphor-dbus-interfaces/yaml/com/intel/Control/
H A DNMISource.interface.yaml2 An interface for NMI signal source.
7 Keeps track of NMI signal source in BMC.
12 whether the BMC enables NMI event.
18 The type of NMI source.
22 NONE NMI signal.
25 Via Front Panel NMI button.
43 Via southbridge NMI.
46 Via chipset NMI.
/openbmc/openbmc-test-automation/openpower/
H A Dtest_nmi_interface.robot19 Trigger NMI When OPAL/Host OS Is Not Up
21 ... while injecting NMI when HOST OS is not up.
25 Trigger NMI
28 Trigger NMI When OPAL/Host OS Is Running And Secureboot Is Disabled
30 ... while injecting NMI, when HOST OS is running and
35 Trigger NMI valid_status_codes=[${HTTP_OK}]
36 Verify Crash Dump Directory After NMI Inject
41 Verify Crash Dump Directory After NMI Inject
42 [Documentation] Verification of crash dump directory after NMI inject.
70 Trigger NMI
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/openbmc/qemu/hw/intc/
H A Darm_gicv3.c24 static bool irqbetter(GICv3CPUState *cs, int irq, uint8_t prio, bool nmi) in irqbetter() argument
41 if (nmi != cs->hppi.nmi) { in irqbetter()
42 return nmi; in irqbetter()
144 uint32_t nmi = 0x0; in gicv3_get_priority() local
147 nmi = extract32(cs->gicr_inmir0, irq, 1); in gicv3_get_priority()
149 nmi = *gic_bmp_ptr32(cs->gic->nmi, irq); in gicv3_get_priority()
150 nmi = nmi & (1 << (irq & 0x1f)); in gicv3_get_priority()
153 if (nmi) { in gicv3_get_priority()
154 /* DS = 0 & Non-secure NMI */ in gicv3_get_priority()
187 bool nmi = false; in gicv3_redist_update_noirqset() local
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H A Dallwinner-a10-pic.c71 return s->nmi; in aw_a10_pic_read()
105 s->nmi = value; in aw_a10_pic_write()
149 VMSTATE_UINT32(nmi, AwA10PICState),
179 s->nmi = 0; in aw_a10_pic_reset()
/openbmc/openpower-proc-control/service_files/
H A Dxyz.openbmc_project.Control.Host.NMI.service.in2 Description=Start the Open Power Host Control NMI service
9 ExecStart=@bindir@/openpower-proc-nmi
10 SyslogIdentifier=openpower-proc-nmi
13 BusName=xyz.openbmc_project.Control.Host.NMI
/openbmc/qemu/include/hw/
H A Dnmi.h2 * NMI monitor handler class and helpers definitions.
27 #define TYPE_NMI "nmi"
30 DECLARE_CLASS_CHECKERS(NMIClass, NMI,
32 #define NMI(obj) \ macro
/openbmc/openbmc/meta-yadro/meta-nicole/recipes-phosphor/host/op-proc-control/
H A D0001-Stop-and-send-SRESET-for-one-thread-only.patch27 @@ -38,7 +38,7 @@ void NMI::nMI()
36 @@ -51,11 +51,19 @@ void NMI::nMI()
/openbmc/phosphor-dbus-interfaces/gen/xyz/openbmc_project/Chassis/Buttons/NMI/
H A Dmeson.build3 sdbusplus_current_path = 'xyz/openbmc_project/Chassis/Buttons/NMI'
8 '../../../../../../yaml/xyz/openbmc_project/Chassis/Buttons/NMI.interface.yaml',
28 'xyz/openbmc_project/Chassis/Buttons/NMI',
/openbmc/phosphor-dbus-interfaces/gen/xyz/openbmc_project/Control/Host/NMI/
H A Dmeson.build3 sdbusplus_current_path = 'xyz/openbmc_project/Control/Host/NMI'
8 '../../../../../../yaml/xyz/openbmc_project/Control/Host/NMI.interface.yaml',
28 'xyz/openbmc_project/Control/Host/NMI',
/openbmc/phosphor-dbus-interfaces/gen/xyz/openbmc_project/Control/Host/
H A Dmeson.build2 subdir('NMI') subdir
51 '../../../../../yaml/xyz/openbmc_project/Control/Host/NMI.interface.yaml',
53 output: ['NMI.md'],
65 'xyz/openbmc_project/Control/Host/NMI',
/openbmc/phosphor-dbus-interfaces/gen/xyz/openbmc_project/Chassis/Buttons/
H A Dmeson.build5 subdir('NMI') subdir
86 '../../../../../yaml/xyz/openbmc_project/Chassis/Buttons/NMI.interface.yaml',
88 output: ['NMI.md'],
100 'xyz/openbmc_project/Chassis/Buttons/NMI',
/openbmc/openbmc/meta-tyan/meta-common/recipes-x86/chassis/x86-power-control/
H A Dpower-config-host0.json11 "LineName" : "nmi-button",
17 "LineName" : "nmi-control",
/openbmc/u-boot/arch/nios2/include/asm/bitops/
H A Datomic.h41 * NMI events can occur at any time, including when interrupts have been
42 * disabled by *_irqsave(). So you can get NMI events occurring while a
43 * *_bit function is holding a spin lock. If the NMI handler also wants
45 * between the original caller of *_bit() and the NMI handler.
/openbmc/openbmc/meta-asrock/meta-e3c256d4i/recipes-x86/chassis/x86-power-control/
H A Dpower-config-host0.json19 // NMI on the host), but as a workaround treating the NMI_BTN_N line
20 // (normally the NMI button input) instead as an output and driving
/openbmc/qemu/hw/ppc/
H A Dspapr_rtas.c471 "FWNMI: ibm,nmi-interlock RTAS called with FWNMI not registered.\n"); in rtas_ibm_nmi_interlock()
473 /* NMI register not called */ in rtas_ibm_nmi_interlock()
480 * The vCPU that hit the NMI should invoke "ibm,nmi-interlock" in rtas_ibm_nmi_interlock()
481 * This should be PARAM_ERROR, but Linux calls "ibm,nmi-interlock" in rtas_ibm_nmi_interlock()
484 * failure causes Linux to print the error "FWNMI: nmi-interlock in rtas_ibm_nmi_interlock()
495 * vCPU issuing "ibm,nmi-interlock" is done with NMI handling, in rtas_ibm_nmi_interlock()
657 spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register", in core_rtas_register_types()
659 spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock", in core_rtas_register_types()
/openbmc/qemu/hw/core/
H A Dnmi.c2 * NMI monitor handler class and helpers.
23 #include "hw/nmi.h"
/openbmc/bmcweb/test/redfish-core/lib/
H A Dsystem_test.cpp54 allowed.emplace_back(resource::ResetType::Nmi); in TEST()
87 allowed.emplace_back(resource::ResetType::Nmi); in TEST()
120 allowed.emplace_back(resource::ResetType::Nmi); in TEST()
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Control/Host/
H A DNMI.interface.yaml6 - name: NMI
/openbmc/bmcweb/redfish-core/include/generated/enums/
H A Dresource.hpp57 Nmi, enumerator
188 {ResetType::Nmi, "Nmi"},

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