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/openbmc/u-boot/board/freescale/ls1012afrdm/
H A DREADME2 --------
3 QorIQ LS1012A FREEDOM (LS1012AFRDM) is a high-performance development
6 high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports.
9 --------------------
10 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A
14 -----------------------
15 - SERDES Connections, 2 lanes supportingspeeds upto 1 Gbit/s
16 - 2 SGMII 1G PHYs
17 - DDR Controller
18 - 4 Gb DDR3L SDRAM memory, running at data rates up to 1 GT/s
[all …]
/openbmc/u-boot/arch/arc/include/asm/
H A Dio.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
15 * ARCv2 based HS38 cores are in-order issue, but still weakly ordered
16 * due to micro-arch buffering/queuing of load/store, cache hit vs. miss ...
19 * - Operand supports fine grained load/store/load+store semantics
20 * - Ensures that selected memory operation issued before it will complete
22 * - DMB guarantees SMP as well as local barrier semantics
23 * (asm-generic/barrier.h ensures sane smp_*mb if not defined here, i.e.
25 * - DSYNC provides DMB+completion_of_cache_bpu_maintenance_ops hence not needed
119 "stb.ab r8, [r1, 1]\n" in __raw_readsb()
[all …]
/openbmc/u-boot/board/freescale/ls1088a/
H A DREADME2 --------
3 The LS1088A Reference Design (RDB) is a high-performance computing,
9 --------------------------------------
10 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc
13 -------------------------------------------
41 -------------------------
42 - SERDES Connections, 16 lanes supporting:
43 - PCI Express - 3.0
44 - SATA 3.0
45 - XFI
[all …]
/openbmc/u-boot/arch/arm/mach-sti/
H A DKconfig10 bool "96Boards STiH410-B2260"
12 Support for 96Board STiH410-B2260 based on STMicrolectronics
15 - 1GB DDR
16 - On-Board USB combo WiFi/Bluetooth RTL8723BU
18 - Ethernet 1000-BaseT
19 - Sata
20 - HDMI
21 - 2 x USB2 type A
22 - micro USB2 type AB
23 - SD card slot
[all …]
/openbmc/linux/drivers/usb/core/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
30 Documentation/driver-api/usb/persist.rst for more info.
45 Say N here unless you require new-device enumeration failure to
64 "Dual-Role" device, which can act as either a device
69 Select this only if your board has Mini-AB/Micro-AB
97 Implements OTG Finite State Machine as specified in On-The-Go
/openbmc/linux/drivers/net/wireless/ath/ath11k/
H A Dhal.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
28 #define HAL_WBM_IDLE_SCATTER_BUF_SIZE (HAL_WBM_IDLE_SCATTER_BUF_SIZE_MAX - \
35 #define HAL_SHADOW_BASE_ADDR(ab) ab->hw_params.regs->hal_shadow_base_addr argument
40 #define HAL_SHADOW_REG(ab, x) (HAL_SHADOW_BASE_ADDR(ab) + (4 * (x))) argument
47 (ab->hw_params.regs->hal_seq_wcss_umac_ce0_src_reg)
49 (ab->hw_params.regs->hal_seq_wcss_umac_ce0_dst_reg)
51 (ab->hw_params.regs->hal_seq_wcss_umac_ce1_src_reg)
53 (ab->hw_params.regs->hal_seq_wcss_umac_ce1_dst_reg)
[all …]
/openbmc/linux/drivers/net/wireless/ath/ath12k/
H A Dhal.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
28 #define HAL_WBM_IDLE_SCATTER_BUF_SIZE (HAL_WBM_IDLE_SCATTER_BUF_SIZE_MAX - \
62 #define HAL_TCL1_RING_ID(ab) ((ab)->hw_params->regs->hal_tcl1_ring_id) argument
63 #define HAL_TCL1_RING_MISC(ab) \ argument
64 ((ab)->hw_params->regs->hal_tcl1_ring_misc)
65 #define HAL_TCL1_RING_TP_ADDR_LSB(ab) \ argument
66 ((ab)->hw_params->regs->hal_tcl1_ring_tp_addr_lsb)
67 #define HAL_TCL1_RING_TP_ADDR_MSB(ab) \ argument
[all …]
/openbmc/u-boot/board/freescale/p1010rdb/
H A DREADME.P1010RDB-PA5 The P1010 is a cost-effective, low-power, highly integrated host processor
14 - 1Gbyte unbuffered DDR3 SDRAM discrete devices (32-bit bus)
15 - 32 Mbyte NOR flash single-chip memory
16 - 32 Mbyte NAND flash memory
17 - 256 Kbit M24256 I2C EEPROM
18 - 16 Mbyte SPI memory
19 - I2C Board EEPROM 128x8 bit memory
20 - SD/MMC connector to interface with the SD memory card
22 - PCIe:
23 - Lane0: x1 mini-PCIe slot
[all …]
/openbmc/linux/Documentation/devicetree/bindings/
H A Dvendor-prefixes.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/vendor-prefixes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
19 "^(at25|bm|devbus|dmacap|dsa|exynos|fsi[ab]|gpio-fan|gpio-key|gpio|gpmc|hdmi|i2c-gpio),.*": true
21 "^(pinctrl-single|#pinctrl-single|PowerPC),.*": true
22 "^(pl022|pxa-mmc|rcar_sound|rotary-encoder|s5m8767|sdhci),.*": true
23 "^(simple-audio-card|st-plgpio|st-spics|ts),.*": true
48 "^active-semi,.*":
[all …]
/openbmc/u-boot/board/freescale/ls1043aqds/
H A DREADME2 --------
3 The LS1043A Development System (QDS) is a high-performance computing,
10 --------------------
11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1043A
15 -----------------------
16 - SERDES Connections, 4 lanes supporting:
17 - PCI Express - 3.0
18 - SGMII, SGMII 2.5
19 - QSGMII
20 - SATA 3.0
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-hrefprev60.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
8 #include "ste-href-ab8500.dtsi"
9 #include "ste-href.dtsi"
33 interrupt-parent = <&gpio6>;
35 pinctrl-names = "default";
36 pinctrl-0 = <&tc35892_hrefprev60_mode>;
38 interrupt-controller;
39 #interrupt-cells = <1>;
42 compatible = "tc3589x-gpio";
[all …]
H A Dste-href.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/leds/common.h>
8 #include "ste-href-family-pinctrl.dtsi"
17 compatible = "simple-battery";
18 battery-type = "lithium-ion-polymer";
21 thermal-zones {
22 battery-thermal {
24 polling-delay = <0>;
[all …]
H A Dste-hrefv60plus.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include "ste-href-ab8500.dtsi"
7 #include "ste-href.dtsi"
10 model = "ST-Ericsson HREF (v60+) platform with Device Tree";
11 compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
13 thermal-zones {
14 chassis-thermal {
16 polling-delay = <20000>;
18 polling-delay-passive = <2000>;
[all …]
/openbmc/u-boot/board/freescale/ls1046aqds/
H A DREADME2 --------
3 The LS1046A Development System (QDS) is a high-performance computing,
10 --------------------
11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1046A
15 -----------------------
16 - SERDES Connections, 8 lanes supporting:
17 - PCI Express - 3.0
18 - SGMII, SGMII 2.5
19 - QSGMII
20 - SATA 3.0
[all …]
/openbmc/u-boot/board/freescale/ls1046ardb/
H A DREADME2 --------
3 The LS1046A Reference Design Board (RDB) is a high-performance computing,
7 debugging environment. The LS1046A RDB is lead-free and RoHS-compliant.
10 --------------------
11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1046A
15 -----------------------
16 - SERDES1 Connections, 4 lanes supporting:
17 - Lane0: XFI with x1 RJ45 connector
18 - Lane1: XFI Cage
19 - Lane2: SGMII.5
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Drenesas,rzv2m-usb3drd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/renesas,rzv2m-usb3drd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
14 * Role swapping function by the ID pin of the Micro-AB receptacle
20 - enum:
21 - renesas,r9a09g011-usb3drd # RZ/V2M
22 - renesas,r9a09g055-usb3drd # RZ/V2MA
23 - const: renesas,rzv2m-usb3drd
[all …]
/openbmc/linux/drivers/hwmon/
H A Dltc4151.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Copyright (C) 2010 Ericsson AB.
25 #include <linux/hwmon-sysfs.h>
42 unsigned int shunt; /* in micro ohms */
51 struct i2c_client *client = data->client; in ltc4151_update_device()
54 mutex_lock(&data->update_lock); in ltc4151_update_device()
58 * (Conversion Rate 6 - 9 Hz) in ltc4151_update_device()
60 if (time_after(jiffies, data->last_updated + HZ / 6) || !data->valid) { in ltc4151_update_device()
63 dev_dbg(&client->dev, "Starting ltc4151 update\n"); in ltc4151_update_device()
66 for (i = 0; i < ARRAY_SIZE(data->regs); i++) { in ltc4151_update_device()
[all …]
/openbmc/linux/drivers/rtc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
141 once-per-second update interrupts, used for synchronization.
159 will be called rtc-test.
173 will be called rtc-88pm860x.
183 will be called rtc-88pm80x.
187 tristate "Abracon AB-RTCMC-32.768kHz-B5ZE-S3"
190 AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip.
193 will be called rtc-ab-b5ze-s3.
[all …]
/openbmc/linux/Documentation/admin-guide/media/
H A Dcx88-cardlist.rst1 .. SPDX-License-Identifier: GPL-2.0
8 .. flat-table::
9 :header-rows: 1
11 :stub-columns: 0
13 * - Card number
14 - Card name
15 - PCI subsystem IDs
17 * - 0
18 - UNKNOWN/GENERIC
19 -
[all …]
/openbmc/linux/include/linux/amba/
H A Dpl022.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2008-2009 ST-Ericsson AB
11 * linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c
30 * enum ssp_interface - interfaces allowed for this SSP Controller
47 * enum ssp_hierarchy - whether SSP is configured as Master or Slave
55 * enum ssp_clock_params - clock parameters, to set SSP clock at a
64 * enum ssp_rx_endian - endianess of Rx FIFO Data
73 * enum ssp_tx_endian - endianess of Tx FIFO Data
81 * enum ssp_data_size - number of bits in one data element
97 * enum ssp_mode - SSP mode of operation (Communication modes)
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-asrock-romed8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "asrock,romed8hm3-bmc", "aspeed,ast2500";
17 stdout-path = &uart5;
26 compatible = "gpio-leds";
30 linux,default-trigger = "timer";
33 system-fault {
[all …]
/openbmc/u-boot/board/freescale/ls2080ardb/
H A DREADME2 --------
3 The LS2080A Reference Design (RDB) is a high-performance computing,
7 The LS2081A Reference Design (RDB) is a high-performance computing,
12 --------------------------------------
13 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A,
17 -----------------------
18 - SERDES Connections, 16 lanes supporting:
19 - PCI Express - 3.0
20 - SATA 3.0
21 - XFI
[all …]
/openbmc/linux/drivers/input/mouse/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
25 includes the standard 2 or 3-button PS/2 mouse, as well as PS/2
109 Say Y here if you have a Fujitsu B-series Lifebook PS/2
171 Say Y here if you have an OLPC XO-1 laptop (with built-in
193 this option, you remove the xf86-input-vmmouse user-space driver
194 or upgrade it to at least xf86-input-vmmouse 13.1.0, which doesn't
195 load in the presence of an in-kernel vmmouse driver.
207 Say Y here if you have a serial (RS-232, COM port) mouse connected
223 These are the touchpads that can be found on post-February 2005
333 Say Y if you have the IBM PC-110 micro-notebook and want its
[all …]
/openbmc/u-boot/board/freescale/t4qds/
H A DREADME2 --------
3 The T4240QDS is a high-performance computing evaluation, development and test
5 optimized to support the high-bandwidth DDR3 memory ports, as well as the
6 highly-configurable SerDes ports. The system is lead-free and RoHS-compliant.
10 32 lanes grouped into four 8-lane banks
12 - High-speed crosspoint switch fabric on selected lanes
13 - Two PCI Express slots with side-band connector supporting
14 - SGMII
15 - XAUI
16 - HiGig
[all …]
/openbmc/u-boot/board/freescale/ls2080aqds/
H A DREADME2 --------
3 The LS2080A Development System (QDS) is a high-performance computing,
10 --------------------
11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A,
15 -----------------------
16 - SERDES Connections, 16 lanes supporting:
17 - PCI Express - 3.0
18 - SGMII, SGMII 2.5
19 - QSGMII
20 - SATA 3.0
[all …]

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