/openbmc/linux/drivers/gpu/drm/bridge/imx/ |
H A D | Kconfig | 7 tristate "Freescale i.MX8QM LVDS display bridge" 14 Freescale i.MX8qm processor. Official name of LDB is pixel mapper. 27 tristate "Freescale i.MX8QM/QXP pixel combiner" 33 Freescale i.MX8qm/qxp processors. 36 tristate "Freescale i.MX8QM/QXP display pixel link" 42 Freescale i.MX8qm/qxp processors.
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H A D | imx8qxp-pixel-combiner.c | 445 MODULE_DESCRIPTION("i.MX8QM/QXP pixel combiner bridge driver");
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H A D | imx8qm-ldb.c | 583 MODULE_DESCRIPTION("i.MX8QM LVDS Display Bridge(LDB)/Pixel Mapper bridge driver");
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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | fsl,imx8qxp-ldb.yaml | 7 title: Freescale i.MX8qm/qxp LVDS Display Bridge 13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels. 15 The i.MX8qm/qxp LDB is controlled by Control and Status Registers(CSR) module. 27 For i.MX8qm LDB, each channel additionally supports up to 30bpp parallel 33 A side note is that i.MX8qm/qxp LDB is officially called pixel mapper in
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H A D | fsl,imx8qxp-pixel-link.yaml | 7 title: Freescale i.MX8qm/qxp Display Pixel Link 13 The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard 21 The i.MX8qm/qxp Display Pixel Link is accessed via System Controller Unit(SCU)
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H A D | fsl,imx8qxp-pixel-combiner.yaml | 7 title: Freescale i.MX8qm/qxp Pixel Combiner 13 The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a
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/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | fsl,imx8qm-lvds-phy.yaml | 7 title: Mixel LVDS PHY for Freescale i.MX8qm SoC 13 The Mixel LVDS PHY IP block is found on Freescale i.MX8qm SoC. 23 The Mixel LVDS PHY found on Freescale i.MX8qm SoC is controlled
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/openbmc/linux/drivers/firmware/imx/ |
H A D | Kconfig | 8 DSP exists on some i.MX8 processors (e.g i.MX8QM, i.MX8QXP). 20 resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
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H A D | imx-scu-soc.c | 85 return "i.MX8QM"; in imx_scu_soc_name()
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/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | fsl,imx8qxp-csr.yaml | 7 title: Freescale i.MX8qm/qxp Control and Status Registers Module 13 As a system controller, the Freescale i.MX8qm/qxp Control and Status
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/openbmc/linux/Documentation/devicetree/bindings/media/ |
H A D | amphion,vpu.yaml | 53 separately. NXP i.MX8QM SoC has one decoder and two encoder, i.MX8QXP SoC 110 # Device node example for i.MX8QM platform:
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/openbmc/linux/Documentation/devicetree/bindings/bus/ |
H A D | fsl,imx8qxp-pixel-link-msi-bus.yaml | 24 Peripherals in i.MX8qm/qxp imaging, LVDS, MIPI DSI and HDMI TX subsystems, 28 The i.MX System Controller Firmware (SCFW) owns and uses the i.MX8qm/qxp
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/openbmc/linux/drivers/phy/freescale/ |
H A D | Kconfig | 18 on NXP's i.MX8qm SoC.
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/openbmc/linux/Documentation/devicetree/bindings/pwm/ |
H A D | pwm-fsl-ftm.txt | 22 - "fsl,imx8qm-ftm-pwm" for PWM compatible with the one integrated on i.MX8QM
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8qm-mek.dts | 12 model = "Freescale i.MX8QM MEK";
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/openbmc/linux/drivers/media/platform/nxp/imx-jpeg/ |
H A D | mxc-jpeg.h | 3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
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H A D | mxc-jpeg-hw.h | 3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
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H A D | mxc-jpeg-hw.c | 3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
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/openbmc/linux/drivers/net/can/flexcan/ |
H A D | flexcan.h | 30 * MX8QM FlexCAN3 03.00.23.00 yes yes no no yes yes 64
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/openbmc/linux/Documentation/devicetree/bindings/firmware/ |
H A D | fsl,scu.yaml | 15 resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
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/openbmc/linux/drivers/pinctrl/freescale/ |
H A D | pinctrl-imx8qm.c | 333 MODULE_DESCRIPTION("NXP i.MX8QM pinctrl driver");
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/openbmc/linux/drivers/remoteproc/ |
H A D | imx_dsp_rproc.c | 279 /* Specific configuration for i.MX8QM */ 951 * On i.MX8QM and i.MX8QXP there is multiple power domains 1034 * For i.MX8QXP and i.MX8QM, DSP should be started and stopped by System
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/openbmc/linux/sound/soc/fsl/ |
H A D | fsl_mqs.c | 200 * But in i.MX8QM/i.MX8QXP the control register is moved in fsl_mqs_probe()
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H A D | fsl_asrc.c | 77 * i.MX8QM/i.MX8QXP uses the same map for input and output. 78 * clk_map_imx8qm[0] is for i.MX8QM asrc0 79 * clk_map_imx8qm[1] is for i.MX8QM asrc1
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/openbmc/linux/Documentation/devicetree/bindings/arm/ |
H A D | fsl.yaml | 1165 - description: i.MX8QM based Boards 1168 - fsl,imx8qm-mek # i.MX8QM MEK Board 1173 - description: i.MX8QM Boards with Toradex Apalis iMX8 Modules 1181 - description: i.MX8QM Boards with Toradex Apalis iMX8 V1.1 Modules
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