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/openbmc/qemu/tests/qemu-iotests/
H A D271.out9 L2 entry #0: 0x8000000000050000 0000000000000001
11 L2 entry #0: 0x8000000000050000 0000000000000003
13 L2 entry #0: 0x8000000000050000 0000000000000007
15 L2 entry #0: 0x8000000000050000 000000000000000f
17 L2 entry #0: 0x8000000000050000 000000000000007f
19 L2 entry #0: 0x8000000000050000 00000000000003ff
21 L2 entry #0: 0x8000000000050000 00000000000103ff
23 L2 entry #0: 0x8000000000050000 00000000800103ff
24 L2 entry #1: 0x8000000000060000 0000000000000003
26 L2 entry #0: 0x8000000000050000 00000002800103fd
[all …]
H A D10356 $QEMU_IO -c "open -o cache-size=1.25M,l2-cache-size=1M,refcount-cache-size=0.25M $TEST_IMG" \
58 # l2-cache-size may not exceed cache-size
59 $QEMU_IO -c "open -o cache-size=1M,l2-cache-size=2M $TEST_IMG" 2>&1 \
66 $QEMU_IO -c "open -o cache-size=0,l2-cache-size=0,refcount-cache-size=0 $TEST_IMG" \
70 $QEMU_IO -c "open -o l2-cache-entry-size=256 $TEST_IMG" \
72 $QEMU_IO -c "open -o l2-cache-entry-size=4242 $TEST_IMG" \
74 $QEMU_IO -c "open -o l2-cache-entry-size=128k $TEST_IMG" \
84 $QEMU_IO -c "open -o l2-cache-size=0 $TEST_IMG" -c 'read -P 42 0 64k' \
94 $QEMU_IO -c "open -o cache-size=2M,l2-cache-size=1M $TEST_IMG" \
101 $QEMU_IO -c "open -o l2-cache-size=1M,refcount-cache-size=0.25M $TEST_IMG" \
[all …]
H A D13772 -c "reopen -o overlap-check.active-l2=on" \
73 -c "reopen -o overlap-check.active-l2=off" \
82 -c "reopen -o overlap-check.inactive-l2=on" \
83 -c "reopen -o overlap-check.inactive-l2=off" \
85 -c "reopen -o l2-cache-size=512k" \
86 -c "reopen -o l2-cache-entry-size=512" \
87 -c "reopen -o l2-cache-entry-size=4k" \
88 -c "reopen -o l2-cache-entry-size=64k" \
109 -c "reopen -o cache-size=1M,l2-cache-size=64k,refcount-cache-size=64k" \
110 -c "reopen -o cache-size=1M,l2-cache-size=2M" \
[all …]
H A D103.out8 qemu-io: can't open device TEST_DIR/t.IMGFMT: cache-size, l2-cache-size and refcount-cache-size may…
9 qemu-io: can't open device TEST_DIR/t.IMGFMT: l2-cache-size may not exceed cache-size
11 qemu-io: can't open device TEST_DIR/t.IMGFMT: cache-size, l2-cache-size and refcount-cache-size may…
12 qemu-io: can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 51…
13 qemu-io: can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 51…
14 qemu-io: can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 51…
33 === Testing minimal L2 cache and COW ===
H A D092.out10 == Invalid L2 table size ==
12 qemu-io: can't open device TEST_DIR/t.qcow: L2 table size must be between 512 and 64k
13 qemu-io: can't open device TEST_DIR/t.qcow: L2 table size must be between 512 and 64k
14 qemu-io: can't open device TEST_DIR/t.qcow: L2 table size must be between 512 and 64k
15 qemu-io: can't open device TEST_DIR/t.qcow: L2 table size must be between 512 and 64k
H A D026.out.nocache17 qemu-io: Failed to flush the L2 table cache: Input/output error
24 qemu-io: Failed to flush the L2 table cache: Input/output error
41 qemu-io: Failed to flush the L2 table cache: No space left on device
48 qemu-io: Failed to flush the L2 table cache: No space left on device
131 qemu-io: Failed to flush the L2 table cache: Input/output error
139 qemu-io: Failed to flush the L2 table cache: Input/output error
159 qemu-io: Failed to flush the L2 table cache: No space left on device
167 qemu-io: Failed to flush the L2 table cache: No space left on device
185 qemu-io: Failed to flush the L2 table cache: Input/output error
192 qemu-io: Failed to flush the L2 table cache: Input/output error
[all …]
H A D026.out17 qemu-io: Failed to flush the L2 table cache: Input/output error
24 qemu-io: Failed to flush the L2 table cache: Input/output error
41 qemu-io: Failed to flush the L2 table cache: No space left on device
48 qemu-io: Failed to flush the L2 table cache: No space left on device
129 qemu-io: Failed to flush the L2 table cache: Input/output error
136 qemu-io: Failed to flush the L2 table cache: Input/output error
153 qemu-io: Failed to flush the L2 table cache: No space left on device
160 qemu-io: Failed to flush the L2 table cache: No space left on device
177 qemu-io: Failed to flush the L2 table cache: Input/output error
184 qemu-io: Failed to flush the L2 table cache: Input/output error
[all …]
H A D137.out19 qemu-io: cache-size, l2-cache-size and refcount-cache-size may not be set at the same time
20 qemu-io: l2-cache-size may not exceed cache-size
22 qemu-io: L2 cache entry size must be a power of two between 512 and the cluster size (65536)
23 qemu-io: L2 cache entry size must be a power of two between 512 and the cluster size (65536)
30 qemu-io: L2 cache size too big
42 qcow2: Marking image as corrupt: Preventing invalid allocation of L2 table at offset 0; further cor…
/openbmc/qemu/tests/unit/
H A Dtest-hbitmap.c20 #define L2 (BITS_PER_LONG * L1) macro
21 #define L3 (BITS_PER_LONG * L2)
245 hbitmap_test_check(data, L2 - 1); in test_hbitmap_iter_partial()
246 hbitmap_test_check(data, L2); in test_hbitmap_iter_partial()
247 hbitmap_test_check(data, L2 + 1); in test_hbitmap_iter_partial()
248 hbitmap_test_check(data, L2 + L1); in test_hbitmap_iter_partial()
249 hbitmap_test_check(data, L2 + L1 * 2 - 1); in test_hbitmap_iter_partial()
250 hbitmap_test_check(data, L2 * 2 - 1); in test_hbitmap_iter_partial()
251 hbitmap_test_check(data, L2 * 2); in test_hbitmap_iter_partial()
252 hbitmap_test_check(data, L2 * 2 + 1); in test_hbitmap_iter_partial()
[all …]
/openbmc/qemu/block/
H A Dqed-l2-cache.c2 * QEMU Enhanced Disk Format L2 Cache
15 * L2 table cache usage is as follows:
17 * An open image has one L2 table cache that is used to avoid accessing the
18 * image file for recently referenced L2 tables.
22 * the L1 and L2 tables which store cluster offsets. It is here where the L2
23 * table cache serves up recently referenced L2 tables.
25 * If there is a cache miss, that L2 table is read from the image file and
26 * committed to the cache. Subsequent accesses to that L2 table will be served
29 * L2 tables are also committed to the cache when new L2 tables are allocated
30 * in the image file. Since the L2 table cache is write-through, the new L2
[all …]
H A Dqed-cluster.c22 * @table: L2 table
68 * @request: L2 cache entry
77 * If the L2 table exists, request->l2_table points to the L2 table cache entry
79 * entry is exposed in this way to avoid callers having to read the L2 table
86 * On failure QED_CLUSTER_L2 or QED_CLUSTER_L1 is returned for missing L2 or L1
101 /* Limit length to L2 boundary. Requests are broken up at the L2 boundary in qed_find_cluster()
102 * so that a request acts on one L2 table at a time. in qed_find_cluster()
/openbmc/qemu/docs/
H A Dqcow2-cache.txt1 qcow2 L2/refcount cache configuration
15 This document attempts to give an overview of the L2 and refcount
36 The L2 tables
40 called the L1 and L2 tables.
45 There can be many L2 tables, depending on how much space has been
48 corresponding L2 table to find out where that data is located. Since
50 an L2 cache in memory to speed up disk access.
52 The size of the L2 cache can be configured, and setting the right
61 L1/L2 tables described above.
74 aforementioned L2 cache, and its size can also be configured.
[all …]
/openbmc/phosphor-dbus-interfaces/yaml/com/ibm/ipzvpd/
H A DLWP0.interface.yaml15 The "20" keyword.Core0 L2 Line delete.
19 The "21" keyword.Core1 L2 Line delete.
23 The "22" keyword.Core2 L2 Line delete.
27 The "23" keyword.Core3 L2 Line delete.
31 The "30" keyword.Core0 L2 Line delete.
35 The "31" keyword.Core1 L2 Line delete.
39 The "32" keyword.Core2 L2 Line delete.
43 The "33" keyword.Core3 L2 Line delete.
H A DLWP2.interface.yaml15 The "20" keyword.Core0 L2 Line delete.
19 The "21" keyword.Core1 L2 Line delete.
23 The "22" keyword.Core2 L2 Line delete.
27 The "23" keyword.Core3 L2 Line delete.
31 The "30" keyword.Core0 L2 Line delete.
35 The "31" keyword.Core1 L2 Line delete.
39 The "32" keyword.Core2 L2 Line delete.
43 The "33" keyword.Core3 L2 Line delete.
H A DLWP5.interface.yaml15 The "20" keyword.Core0 L2 Line delete.
19 The "21" keyword.Core1 L2 Line delete.
23 The "22" keyword.Core2 L2 Line delete.
27 The "23" keyword.Core3 L2 Line delete.
31 The "30" keyword.Core0 L2 Line delete.
35 The "31" keyword.Core1 L2 Line delete.
39 The "32" keyword.Core2 L2 Line delete.
43 The "33" keyword.Core3 L2 Line delete.
H A DLWP1.interface.yaml15 The "20" keyword.Core0 L2 Line delete.
19 The "21" keyword.Core1 L2 Line delete.
23 The "22" keyword.Core2 L2 Line delete.
27 The "23" keyword.Core3 L2 Line delete.
31 The "30" keyword.Core0 L2 Line delete.
35 The "31" keyword.Core1 L2 Line delete.
39 The "32" keyword.Core2 L2 Line delete.
43 The "33" keyword.Core3 L2 Line delete.
H A DLWP6.interface.yaml15 The "20" keyword.Core0 L2 Line delete.
19 The "21" keyword.Core1 L2 Line delete.
23 The "22" keyword.Core2 L2 Line delete.
27 The "23" keyword.Core3 L2 Line delete.
31 The "30" keyword.Core0 L2 Line delete.
35 The "31" keyword.Core1 L2 Line delete.
39 The "32" keyword.Core2 L2 Line delete.
43 The "33" keyword.Core3 L2 Line delete.
H A DLWP7.interface.yaml15 The "20" keyword.Core0 L2 Line delete.
19 The "21" keyword.Core1 L2 Line delete.
23 The "22" keyword.Core2 L2 Line delete.
27 The "23" keyword.Core3 L2 Line delete.
31 The "30" keyword.Core0 L2 Line delete.
35 The "31" keyword.Core1 L2 Line delete.
39 The "32" keyword.Core2 L2 Line delete.
43 The "33" keyword.Core3 L2 Line delete.
H A DLWP3.interface.yaml15 The "20" keyword.Core0 L2 Line delete.
19 The "21" keyword.Core1 L2 Line delete.
23 The "22" keyword.Core2 L2 Line delete.
27 The "23" keyword.Core3 L2 Line delete.
31 The "30" keyword.Core0 L2 Line delete.
35 The "31" keyword.Core1 L2 Line delete.
39 The "32" keyword.Core2 L2 Line delete.
43 The "33" keyword.Core3 L2 Line delete.
H A DLWP4.interface.yaml15 The "20" keyword.Core0 L2 Line delete.
19 The "21" keyword.Core1 L2 Line delete.
23 The "22" keyword.Core2 L2 Line delete.
27 The "23" keyword.Core3 L2 Line delete.
31 The "30" keyword.Core0 L2 Line delete.
35 The "31" keyword.Core1 L2 Line delete.
39 The "32" keyword.Core2 L2 Line delete.
43 The "33" keyword.Core3 L2 Line delete.
/openbmc/qemu/target/i386/
H A Dmonitor.c73 unsigned int l1, l2; in tlb_info_32() local
85 for(l2 = 0; l2 < 1024; l2++) { in tlb_info_32()
86 cpu_physical_memory_read((pde & ~0xfff) + l2 * 4, &pte, 4); in tlb_info_32()
89 print_pte(mon, env, (l1 << 22) + (l2 << 12), in tlb_info_32()
101 unsigned int l1, l2, l3; in tlb_info_pae32() local
111 for (l2 = 0; l2 < 512; l2++) { in tlb_info_pae32()
112 cpu_physical_memory_read(pd_addr + l2 * 8, &pde, 8); in tlb_info_pae32()
117 print_pte(mon, env, (l1 << 30) + (l2 << 21), pde, in tlb_info_pae32()
125 print_pte(mon, env, (l1 << 30) + (l2 << 21) in tlb_info_pae32()
142 uint64_t l1, l2, l3, l4; in tlb_info_la48() local
[all …]
/openbmc/qemu/target/mips/tcg/
H A Dloong_translate.c32 TCGLabel *l1, *l2, *l3; in gen_lext_DIV_G() local
42 l2 = gen_new_label(); in gen_lext_DIV_G()
57 tcg_gen_brcondi_tl(TCG_COND_NE, t0, is_double ? LLONG_MIN : INT_MIN, l2); in gen_lext_DIV_G()
58 tcg_gen_brcondi_tl(TCG_COND_NE, t1, -1LL, l2); in gen_lext_DIV_G()
62 gen_set_label(l2); in gen_lext_DIV_G()
86 TCGLabel *l1, *l2; in gen_lext_DIVU_G() local
96 l2 = gen_new_label(); in gen_lext_DIVU_G()
108 tcg_gen_br(l2); in gen_lext_DIVU_G()
114 gen_set_label(l2); in gen_lext_DIVU_G()
133 TCGLabel *l1, *l2, *l3; in gen_lext_MOD_G() local
[all …]
/openbmc/phosphor-webui/app/assets/icons/
H A Dicon-config.svg1 …L2.7 11a2 2 0 0 0 .41 2.51L5 15.24v1.53l-1.89 1.68A2 2 0 0 0 2.7 21l2.36 4a2 2 0 0 0 1.73 1 2 2 0 …
/openbmc/u-boot/arch/arm/dts/
H A Dbcm63158.dtsi22 next-level-cache = <&l2>;
30 next-level-cache = <&l2>;
38 next-level-cache = <&l2>;
46 next-level-cache = <&l2>;
50 l2: l2-cache0 { label
H A Dbcm6858.dtsi22 next-level-cache = <&l2>;
30 next-level-cache = <&l2>;
38 next-level-cache = <&l2>;
46 next-level-cache = <&l2>;
50 l2: l2-cache0 { label

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