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Searched full:jh7110_sysclk_cpu_bus (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7110-sys.c43 JH71X0__DIV(JH7110_SYSCLK_CPU_BUS, "cpu_bus", 2, JH7110_SYSCLK_CPU_CORE),
82 JH71X0_GATE(JH7110_SYSCLK_DEBUG, "debug", 0, JH7110_SYSCLK_CPU_BUS),
89 JH71X0_GATE(JH7110_SYSCLK_TRACE_COM, "trace_com", 0, JH7110_SYSCLK_CPU_BUS),
92 JH7110_SYSCLK_CPU_BUS),
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dstarfive,jh7110-stgcrg.yaml72 <&syscrg JH7110_SYSCLK_CPU_BUS>,
/openbmc/linux/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h19 #define JH7110_SYSCLK_CPU_BUS 2 macro
/openbmc/linux/arch/riscv/boot/dts/starfive/
H A Djh7110.dtsi575 <&syscrg JH7110_SYSCLK_CPU_BUS>,