| /openbmc/linux/arch/powerpc/boot/dts/fsl/ |
| H A D | t4240si-post.dtsi | 54 interrupts = <25 2 0 0>;
64 interrupts = <20 2 0 0>;
71 interrupts = <20 2 0 0>;
90 interrupts = <21 2 0 0>;
97 interrupts = <21 2 0 0>;
116 interrupts = <22 2 0 0>;
123 interrupts = <22 2 0 0>;
142 interrupts = <23 2 0 0>;
149 interrupts = <23 2 0 0>;
163 interrupts = <16 2 1 11>;
[all …]
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| H A D | bsc9132si-post.dtsi | 39 /* FIXME: Test whether interrupts are split */
40 interrupts = <16 2 0 0 20 2 0 0>;
50 interrupts = <16 2 0 0>;
58 interrupts = <16 2 0 0>;
87 interrupts = <16 2 0 0>;
93 interrupts = <16 2 1 8>;
98 interrupts = <17 2 0 0>;
103 interrupts = <17 2 0 0>;
108 interrupts = <18 2 0 0>;
112 interrupts = <18 2 0 0 >;
[all …]
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| H A D | bsc9131si-post.dtsi | 39 interrupts = <16 2 0 0 20 2 0 0>;
58 interrupts = <16 2 0 0>;
64 interrupts = <16 2 0 0>;
69 interrupts = <17 2 0 0>;
74 interrupts = <17 2 0 0>;
79 interrupts = <18 2 0 0>;
83 interrupts = <18 2 0 0 >;
88 interrupts = <22 0x2 0 0>;
93 interrupts = <19 0x2 0 0>;
101 interrupts = <16 2 0 0>;
[all …]
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| H A D | b4si-post.dtsi | 54 interrupts = <25 2 0 0>;
64 interrupts = <20 2 0 0>;
72 interrupts = <20 2 0 0>;
91 interrupts = <52 2 0 0
154 interrupts = <105 2 0 0>;
159 interrupts = <107 2 0 0>;
164 interrupts = <109 2 0 0>;
169 interrupts = <111 2 0 0>;
174 interrupts = <113 2 0 0>;
179 interrupts = <115 2 0 0>;
[all …]
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| /openbmc/linux/arch/arm/boot/dts/arm/ |
| H A D | arm-realview-pba8.dts | 46 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
63 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
68 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
81 interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
86 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
91 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
96 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
101 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
106 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
111 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
[all …]
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| H A D | arm-realview-pbx-a9.dts | 90 interrupts = <1 13 0xf04>;
97 interrupts = <1 14 0xf04>;
103 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>,
121 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
126 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
131 interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
136 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
141 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
146 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
151 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
[all …]
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| H A D | arm-realview-eb.dts | 69 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
74 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
79 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
84 interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>,
90 interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
95 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
100 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
105 interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
110 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
115 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
[all …]
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| H A D | arm-realview-eb-mp.dtsi | 59 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
66 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>,
95 interrupts = <1 13 0xf04>;
102 interrupts = <1 14 0xf04>;
109 interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>,
124 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
129 interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>;
134 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
139 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>,
145 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/edac/ |
| H A D | socfpga-eccmgr.txt | 19 - interrupts : Should be single bit error interrupt, then double bit error
27 - interrupts : Should be single bit error interrupt, then double bit error
41 interrupts = <0 36 1>, <0 37 1>;
48 interrupts = <0 178 1>, <0 179 1>;
63 - interrupts : Should be single bit error interrupt, then double bit error
75 - interrupts : Should be single bit error interrupt, then double bit error
82 - interrupts : Should be single bit error interrupt, then double bit error
90 - interrupts : Should be single bit error interrupt, then double bit error
98 - interrupts : Should be single bit error interrupt, then double bit error
106 - interrupts : Should be single bit error interrupt, then double bit error
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/scsi/ |
| H A D | hisilicon-sas.txt | 21 - interrupts : For v1 hw: Interrupts for phys, completion queues, and fatal
22 sources; the interrupts are ordered in 3 groups, as follows:
23 - Phy interrupts
24 - Completion queue interrupts
25 - Fatal interrupts
26 Phy interrupts : Each phy has 3 interrupt sources:
30 The phy interrupts are ordered into groups of 3 per phy
32 Completion queue interrupts : each completion queue has 1
34 The interrupts are ordered in increasing order.
35 Fatal interrupts : the fatal interrupts are ordered as follows:
[all …]
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| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8dxl-ss-adma.dtsi | 15 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
20 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
25 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
30 interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
35 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
40 interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
45 interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
50 interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
55 interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
59 interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
[all …]
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| /openbmc/linux/arch/arm/boot/dts/hisilicon/ |
| H A D | hisi-x5hd2.dtsi | 43 interrupts = <0 24 4>;
57 interrupts = <0 25 4>;
66 interrupts = <0 26 4>;
75 interrupts = <0 27 4>;
84 interrupts = <0 28 4>;
92 interrupts = <0 49 4>;
101 interrupts = <0 50 4>;
110 interrupts = <0 51 4>;
119 interrupts = <0 52 4>;
128 interrupts = <0 53 4>;
[all …]
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| /openbmc/linux/arch/powerpc/boot/dts/ |
| H A D | lite5200.dts | 55 // 5200 interrupts are encoded into two levels;
65 interrupts = <1 9 0>;
72 interrupts = <1 10 0>;
78 interrupts = <1 11 0>;
84 interrupts = <1 12 0>;
90 interrupts = <1 13 0>;
96 interrupts = <1 14 0>;
102 interrupts = <1 15 0>;
108 interrupts = <1 16 0>;
114 interrupts = <1 5 0 1 6 0>;
[all …]
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| H A D | mpc5200b.dtsi | 56 // 5200 interrupts are encoded into two levels;
67 interrupts = <1 9 0>;
75 interrupts = <1 10 0>;
82 interrupts = <1 11 0>;
89 interrupts = <1 12 0>;
96 interrupts = <1 13 0>;
103 interrupts = <1 14 0>;
110 interrupts = <1 15 0>;
117 interrupts = <1 16 0>;
123 interrupts = <1 5 0 1 6 0>;
[all …]
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| /openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx25.dtsi | 97 interrupts = <3>;
108 interrupts = <10>;
115 interrupts = <43>;
124 interrupts = <44>;
133 interrupts = <45>;
142 interrupts = <32>;
155 interrupts = <4>;
165 interrupts = <2>;
176 interrupts = <14>;
187 interrupts = <24>;
[all …]
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| H A D | imx27.dtsi | 94 interrupts = <32>;
105 interrupts = <27>;
112 interrupts = <26>;
121 interrupts = <25>;
130 interrupts = <24>;
140 interrupts = <23>;
149 interrupts = <22>;
158 interrupts = <21>;
173 interrupts = <20>;
183 interrupts = <19>;
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | ti,pruss-intc.yaml | 15 which are then mapped to 10 possible output interrupts through two levels
18 interrupts (0, 1) are fed exclusively to the internal PRU cores, with the
23 differences on the output interrupts 2 through 9. If this property is not
24 defined, it implies that all the PRUSS INTC output interrupts 2 through 9
29 different possible output interrupts. The additional output interrupts (10
54 interrupts:
58 All the interrupts generated towards the main host processor in the SoC.
79 host_event (target) [cell 3] as the value of the interrupts property in
81 interrupts through 2 levels of many-to-one mapping i.e. events to channel
82 mapping and channels to host interrupts so through this property entire
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | samsung,pinctrl-wakeup-interrupt.yaml | 18 External wake-up interrupts for Samsung S3C/S5P/Exynos SoC pin controller.
21 interrupts child node (in other words, only one External wake-up interrupts
24 external wake-up interrupts child node.
41 interrupts:
43 Interrupt used by multiplexed external wake-up interrupts.
60 interrupts:
64 - interrupts
73 interrupts:
77 - interrupts
89 interrupts:
[all …]
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | imx6sx.dtsi | 145 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
157 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
167 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
177 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
193 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
224 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
248 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
260 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
272 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
284 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
[all …]
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| H A D | omap3.dtsi | 50 interrupts = <3>;
85 interrupts = <9 10>;
163 interrupts = <0>;
171 interrupts = <11>;
211 interrupts = <12>,
224 interrupts = <29>;
236 interrupts = <30>;
247 interrupts = <31>;
258 interrupts = <32>;
269 interrupts = <33>;
[all …]
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| H A D | imx6ul.dtsi | 141 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
153 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
169 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
203 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
215 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
227 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
239 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
250 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
261 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
272 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
[all …]
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| /openbmc/linux/arch/arm/boot/dts/marvell/ |
| H A D | mmp2.dtsi | 46 interrupts = <8>;
64 interrupts = <4>;
74 interrupts = <5>;
85 interrupts = <9>;
95 interrupts = <17>;
105 interrupts = <35>;
115 interrupts = <51>;
125 interrupts = <55>;
143 interrupts = <44>;
156 interrupts = <39>;
[all …]
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| H A D | mmp3.dtsi | 59 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
69 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
79 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
89 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
99 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
109 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
119 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
129 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
139 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
149 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
[all …]
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| /openbmc/linux/arch/arm/boot/dts/synaptics/ |
| H A D | berlin2cd.dtsi | 48 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
70 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
96 interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>;
103 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>;
110 interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>;
134 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
152 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
188 interrupts = <0>;
206 interrupts = <1>;
224 interrupts = <2>;
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/timer/ |
| H A D | samsung,exynos4210-mct.yaml | 15 up-counter and can generate 4 interrupts when the counter reaches one of the
62 interrupts:
64 Interrupts should be put in specific order. This is, the local timer
65 interrupts should be specified after the four global timer interrupts
87 - interrupts
109 interrupts:
120 interrupts:
136 interrupts:
148 interrupts:
157 // interrupts, so two local timer interrupts have been specified,
[all …]
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