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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-vpu.dtsi20 power-domains = <&pd IMX_SC_R_VPU_MU_0>;
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Damphion,vpu.yaml127 power-domains = <&pd IMX_SC_R_VPU_MU_0>;
/openbmc/linux/include/dt-bindings/firmware/imx/
H A Drsrc.h552 #define IMX_SC_R_VPU_MU_0 535 macro
/openbmc/linux/drivers/pmdomain/imx/
H A Dscu-pd.c192 { "vpu-mu0", IMX_SC_R_VPU_MU_0, 1, false, 0 },