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/openbmc/u-boot/drivers/i2c/
H A DKconfig2 # I2C subsystem configuration
5 menu "I2C support"
8 bool "Enable Driver Model for I2C drivers"
11 Enable driver model for I2C. The I2C uclass interface: probe, read,
15 is defined in include/i2c.h. When i2c bus driver supports the i2c
20 bool "Enable I2C compatibility layer"
23 Enable old-style I2C functions for compatibility with existing code.
29 tristate "Chrome OS EC tunnel I2C bus"
32 This provides an I2C bus that will tunnel i2c commands through to
33 the other side of the Chrome OS EC to the I2C bus connected there.
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/openbmc/linux/drivers/i2c/busses/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 menu "I2C Hardware Bus support"
9 comment "PC SMBus host controller drivers"
16 for Cypress CCGx Type-C controller. Individual bus drivers
24 Host controller on Acer Labs Inc. (ALI) M1535 South Bridges. The SMB
25 controller is part of the 7101 device, which is an ACPI-compliant
29 will be called i2c-ali1535.
36 Host controller on Acer Labs Inc. (ALI) M1563 South Bridges. The SMB
37 controller is part of the 7101 device, which is an ACPI-compliant
41 will be called i2c-ali1563.
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/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dnvidia,tegra20-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Thierry Reding <thierry.reding@gmail.com>
9 - Jon Hunter <jonathanh@nvidia.com>
11 title: NVIDIA Tegra I2C controller driver
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
18 only support master mode of I2C communication. Driver of I2C
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H A Dsnps,designware-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB I2C Controller
10 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
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H A Di2c-pxa-pci-ce4100.txt1 CE4100 I2C
2 ----------
4 CE4100 has one PCI device which is described as the I2C-Controller. This
5 PCI device has three PCI-bars, each bar contains a complete I2C
6 controller. So we have a total of three independent I2C-Controllers
8 The driver is probed via the PCI-ID and is gathering the information of
10 Grant Likely recommended to use the ranges property to map the PCI-Bar
12 of the specific I2C controller. This were his exact words:
22 non-zero if you had 2 or more devices mapped off
30 ------------------------------------------------
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H A Dopencores,i2c-ocores.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/opencores,i2c-ocores.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: OpenCores I2C controller
10 - Peter Korsgaard <peter@korsgaard.com>
11 - Andrew Lunn <andrew@lunn.ch>
14 - $ref: /schemas/i2c/i2c-controller.yaml#
19 - items:
20 - enum:
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H A Di2c-pxa.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-pxa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP I2C controller
10 - Rob Herring <robh+dt@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
17 - mrvl,i2c-polling
20 - interrupts
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H A Di2c-mt65xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek I2C controller
10 This driver interfaces with the native I2C controller present in
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Qii Wang <qii.wang@mediatek.com>
22 - const: mediatek,mt2712-i2c
23 - const: mediatek,mt6577-i2c
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H A Di2c-owl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-owl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Actions Semi Owl I2C Controller
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 This I2C controller is found in the Actions Semi Owl SoCs:
17 - $ref: /schemas/i2c/i2c-controller.yaml#
22 - actions,s500-i2c # Actions Semi S500 compatible SoCs
23 - actions,s700-i2c # Actions Semi S700 compatible SoCs
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H A Dbrcm,iproc-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/brcm,iproc-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom iProc I2C controller
10 - Rafał Miłecki <rafal@milecki.pl>
15 - brcm,iproc-i2c
16 - brcm,iproc-nic-i2c
21 clock-frequency:
26 Should contain the I2C interrupt. For certain revisions of the I2C
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H A Di2c-rk3x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
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H A Dingenic,i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/ingenic,i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs I2C controller
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
17 pattern: "^i2c@[0-9a-f]+$"
21 - enum:
22 - ingenic,jz4770-i2c
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H A Dcdns,i2c-r1p10.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence I2C controller
10 - Michal Simek <michal.simek@amd.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - cdns,i2c-r1p10 # cadence i2c controller version 1.0
19 - cdns,i2c-r1p14 # cadence i2c controller version 1.4
33 clock-frequency:
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H A Dhisilicon,ascend910-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/hisilicon,ascend910-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: HiSilicon common I2C controller
10 - Yicong Yang <yangyicong@hisilicon.com>
13 The HiSilicon common I2C controller can be used for many different
17 - $ref: /schemas/i2c/i2c-controller.yaml#
21 const: hisilicon,ascend910-i2c
32 clock-frequency:
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H A Dnvidia,tegra186-bpmp-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra186-bpmp-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) BPMP I2C controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 owns certain HW devices, such as the I2C controller for the power
16 management I2C bus. Software running on other CPUs must perform IPC to
17 the BPMP in order to execute transactions on that I2C bus. This
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H A Di2c-exynos5.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung's High Speed I2C controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The Samsung's High Speed I2C controller is used to interface with I2C devices
16 In case the HSI2C controller is encapsulated within USI block (it's the case
18 define USI node in device tree file, choosing "i2c" configuration. Please see
19 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
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H A Di2c-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
10 - Oleksij Rempel <o.rempel@pengutronix.de>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: fsl,imx1-i2c
19 - const: fsl,imx21-i2c
20 - const: fsl,vf610-i2c
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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmctp-i2c-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mctp-i2c-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MCTP I2C transport
10 - Matt Johnston <matt@codeconstruct.com.au>
13 An mctp-i2c-controller defines a local MCTP endpoint on an I2C controller.
14 MCTP I2C is specified by DMTF DSP0237.
16 An mctp-i2c-controller must be attached to an I2C adapter which supports
17 slave functionality. I2C busses (either directly or as subordinate mux
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/openbmc/linux/Documentation/devicetree/bindings/
H A Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Trivial I2C and SPI devices
10 - Rob Herring <robh@kernel.org>
13 This is a list of trivial I2C and SPI devices that have simple device tree
27 spi-max-frequency: true
31 - enum:
33 - acbel,fsg032
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/openbmc/linux/drivers/clk/qcom/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
40 tristate "MSM8916 APCS Clock Controller"
43 Support for the APCS Clock Controller on msm8916 devices. The
49 tristate "MSM8996 CPU Clock Controller"
54 Support for the CPU clock controller on msm8996 devices.
59 tristate "SDX55 and SDX65 APCS Clock Controller"
63 Support for the APCS Clock Controller on SDX55, SDX65 platforms. The
69 tristate "RPM based Clock Controller"
82 tristate "RPM over SMD based Clock Controller"
104 tristate "APQ8084 Global Clock Controller"
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/openbmc/linux/drivers/input/touchscreen/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 support for the built-in touchscreen.
25 module will be called 88pm860x-ts.
33 ADS7846/TSC2046/AD7873 or ADS7843/AD7843 controller,
34 and your board-specific setup code includes that in its
51 AD7877 controller, and your board-specific initialization
60 tristate "Analog Devices AD7879-1/AD7889-1 touchscreen interface"
63 the AD7879-1/AD7889-1 controller.
71 tristate "support I2C bus connection"
72 depends on TOUCHSCREEN_AD7879 && I2C
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/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-facebook-yosemite4.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/leds/leds-pca955x.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,yosemite4-bmc", "aspeed,ast2600";
44 stdout-path = "serial4:57600n8";
52 iio-hwmon {
53 compatible = "iio-hwmon";
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H A Daspeed-bmc-facebook-catalina.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/usb/pd.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/i2c/i2c.h>
14 compatible = "facebook,catalina-bmc", "aspeed,ast2600";
64 stdout-path = "serial4:57600n8";
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/openbmc/u-boot/doc/
H A DI2C_Edge_Conditions1 I2C Edge Conditions:
4 I2C devices may be left in a write state if a read was occuring
9 2) I2C controller issues a start command.
10 3) The I2C writes the device address.
14 1) The I2C controller issues a start command.
15 2) The I2C controller writes the device address.
16 3) The I2C controller writes the offset.
30 -----
31 !!!THIS IS AN UNDOCUMENTED I2C BUS BUG, NOT A AMCC 4xx BUG!!!
33 This reset edge condition could possibly be present in every I2C
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/openbmc/linux/drivers/mfd/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
45 tristate "Active-semi ACT8945A"
48 depends on I2C && OF
50 Support for the ACT8945A PMIC from Active-semi. This device
51 features three step-down DC/DC converters and four low-dropout
67 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
70 called sun4i-gpadc.
77 depends on I2C=y
83 depends on I2C
90 Ampere's Altra SMpro exposes an I2C regmap interface that can
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