Home
last modified time | relevance | path

Searched full:grf (Results 1 – 25 of 188) sorted by relevance

12345678

/openbmc/linux/Documentation/devicetree/bindings/soc/rockchip/
H A Dgrf.yaml4 $id: http://devicetree.org/schemas/soc/rockchip/grf.yaml#
7 title: Rockchip General Register Files (GRF)
18 - rockchip,rk3566-pipe-grf
19 - rockchip,rk3568-pcie3-phy-grf
20 - rockchip,rk3568-pipe-grf
21 - rockchip,rk3568-pipe-phy-grf
22 - rockchip,rk3568-usb2phy-grf
23 - rockchip,rk3588-bigcore0-grf
24 - rockchip,rk3588-bigcore1-grf
26 - rockchip,rk3588-php-grf
[all …]
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-rk.c82 struct regmap *grf; member
108 if (IS_ERR(bsp_priv->grf)) { in px30_set_to_rmii()
109 dev_err(dev, "%s: Missing rockchip,grf property\n", __func__); in px30_set_to_rmii()
113 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_to_rmii()
129 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_rmii_speed()
137 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_rmii_speed()
188 if (IS_ERR(bsp_priv->grf)) { in rk3128_set_to_rgmii()
189 dev_err(dev, "Missing rockchip,grf property\n"); in rk3128_set_to_rgmii()
193 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_to_rgmii()
196 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON0, in rk3128_set_to_rgmii()
[all …]
/openbmc/u-boot/drivers/net/
H A Dgmac_rockchip.c77 struct rk322x_grf *grf; in rk3228_gmac_fix_mac_speed() local
102 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3228_gmac_fix_mac_speed()
103 rk_clrsetreg(&grf->mac_con[1], RK3228_GMAC_CLK_SEL_MASK, clk); in rk3228_gmac_fix_mac_speed()
110 struct rk3288_grf *grf; in rk3288_gmac_fix_mac_speed() local
128 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3288_gmac_fix_mac_speed()
129 rk_clrsetreg(&grf->soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk); in rk3288_gmac_fix_mac_speed()
136 struct rk3328_grf_regs *grf; in rk3328_gmac_fix_mac_speed() local
161 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3328_gmac_fix_mac_speed()
162 rk_clrsetreg(&grf->mac_con[1], RK3328_GMAC_CLK_SEL_MASK, clk); in rk3328_gmac_fix_mac_speed()
169 struct rk3368_grf *grf; in rk3368_gmac_fix_mac_speed() local
[all …]
/openbmc/linux/drivers/soc/rockchip/
H A Dgrf.c138 .compatible = "rockchip,rk3036-grf",
141 .compatible = "rockchip,rk3128-grf",
144 .compatible = "rockchip,rk3228-grf",
147 .compatible = "rockchip,rk3288-grf",
150 .compatible = "rockchip,rk3328-grf",
153 .compatible = "rockchip,rk3368-grf",
156 .compatible = "rockchip,rk3399-grf",
159 .compatible = "rockchip,rk3566-pipe-grf",
162 .compatible = "rockchip,rk3588-sys-grf",
173 struct regmap *grf; in rockchip_grf_init() local
[all …]
/openbmc/u-boot/drivers/video/rockchip/
H A Drk3288_mipi.c32 struct rk3288_grf *grf = priv->grf; in rk_mipi_dsi_source_select() local
38 rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK, in rk_mipi_dsi_source_select()
43 rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK, in rk_mipi_dsi_source_select()
59 struct rk3288_grf *grf = priv->grf; in rk_mipi_dphy_mode_set() local
64 rk_clrsetreg(&grf->soc_con8, RK3288_DPHY_TX0_RXMODE_MASK, val); in rk_mipi_dphy_mode_set()
69 rk_clrsetreg(&grf->soc_con8, in rk_mipi_dphy_mode_set()
75 rk_clrsetreg(&grf->soc_con8, in rk_mipi_dphy_mode_set()
135 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk_mipi_ofdata_to_platdata()
136 if (IS_ERR_OR_NULL(priv->grf)) { in rk_mipi_ofdata_to_platdata()
137 debug("%s: Get syscon grf failed (ret=%p)\n", in rk_mipi_ofdata_to_platdata()
[all …]
H A Drk3399_mipi.c30 struct rk3399_grf_regs *grf = priv->grf; in rk_mipi_dsi_source_select() local
36 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
40 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
55 struct rk3399_grf_regs *grf = priv->grf; in rk_mipi_dphy_mode_set() local
60 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val); in rk_mipi_dphy_mode_set()
64 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val); in rk_mipi_dphy_mode_set()
68 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val); in rk_mipi_dphy_mode_set()
127 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk_mipi_ofdata_to_platdata()
128 if (IS_ERR_OR_NULL(priv->grf)) { in rk_mipi_ofdata_to_platdata()
129 debug("%s: Get syscon grf failed (ret=%p)\n", in rk_mipi_ofdata_to_platdata()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-naneng-combphy.yaml64 rockchip,pipe-grf:
67 Some additional phy settings are accessed through GRF regs.
69 rockchip,pipe-phy-grf:
72 Some additional pipe settings are accessed through GRF regs.
83 - rockchip,pipe-grf
84 - rockchip,pipe-phy-grf
120 compatible = "rockchip,rk3568-pipe-grf", "syscon";
125 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
139 rockchip,pipe-grf = <&pipegrf>;
140 rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
/openbmc/linux/drivers/phy/rockchip/
H A Dphy-rockchip-usb.c56 int (*init_usb_uart)(struct regmap *grf,
324 static int __init rockchip_init_usb_uart_common(struct regmap *grf, in rockchip_init_usb_uart_common() argument
342 ret = regmap_write(grf, regoffs + UOC_CON0, val); in rockchip_init_usb_uart_common()
348 ret = regmap_write(grf, regoffs + UOC_CON2, val); in rockchip_init_usb_uart_common()
359 ret = regmap_write(grf, UOC_CON3, val); in rockchip_init_usb_uart_common()
374 static int __init rk3188_init_usb_uart(struct regmap *grf, in rk3188_init_usb_uart() argument
380 ret = rockchip_init_usb_uart_common(grf, pdata); in rk3188_init_usb_uart()
388 ret = regmap_write(grf, RK3188_UOC0_CON0, val); in rk3188_init_usb_uart()
424 static int __init rk3288_init_usb_uart(struct regmap *grf, in rk3288_init_usb_uart() argument
430 ret = rockchip_init_usb_uart_common(grf, pdata); in rk3288_init_usb_uart()
[all …]
H A Dphy-rockchip-dp.c28 struct regmap *grf; member
38 ret = regmap_write(dp->grf, GRF_SOC_CON12, in rockchip_set_phy_state()
50 ret = regmap_write(dp->grf, GRF_SOC_CON12, in rockchip_set_phy_state()
107 dp->grf = syscon_node_to_regmap(dev->parent->of_node); in rockchip_dp_phy_probe()
108 if (IS_ERR(dp->grf)) { in rockchip_dp_phy_probe()
110 return PTR_ERR(dp->grf); in rockchip_dp_phy_probe()
113 ret = regmap_write(dp->grf, GRF_SOC_CON12, GRF_EDP_REF_CLK_SEL_INTER | in rockchip_dp_phy_probe()
116 dev_err(dp->dev, "Could not config GRF edp ref clk: %d\n", ret); in rockchip_dp_phy_probe()
/openbmc/linux/Documentation/devicetree/bindings/display/rockchip/
H A Dcdn-dp-rockchip.txt12 Required elements: "core-clk" "pclk" "spdif" "grf"
22 - rockchip,grf: this soc should set GRF regs, so need get grf here.
43 clock-names = "core-clk", "pclk", "spdif", "grf";
51 rockchip,grf = <&grf>;
H A Drockchip,dw-hdmi.yaml50 - description: Power for GRF IO
61 - grf
65 - grf
116 rockchip,grf:
119 phandle to the GRF to mux vopl/vopb.
129 - rockchip,grf
144 rockchip,grf = <&grf>;
H A Drockchip,analogix-dp.yaml28 - const: grf
39 rockchip,grf:
42 This SoC makes use of GRF regs.
50 - rockchip,grf
72 rockchip,grf = <&grf>;
/openbmc/u-boot/arch/arm/mach-rockchip/
H A Drk3188-board.c27 struct rk3188_grf *grf; in board_late_init() local
30 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in board_late_init()
31 if (IS_ERR(grf)) { in board_late_init()
32 pr_err("grf syscon returned %ld\n", PTR_ERR(grf)); in board_late_init()
35 rk_clrsetreg(&grf->soc_con0, in board_late_init()
H A Drk3399-board-spl.c135 struct rk3399_grf_regs * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
143 rk_clrsetreg(&grf->gpio2c_iomux, in board_debug_uart_init()
146 rk_clrsetreg(&grf->gpio2c_iomux, in board_debug_uart_init()
151 rk_setreg(&grf->io_vsel, 1 << 0); in board_debug_uart_init()
165 rk_clrsetreg(&grf->gpio4c_iomux, in board_debug_uart_init()
168 rk_clrsetreg(&grf->gpio4c_iomux, in board_debug_uart_init()
172 rk_clrsetreg(&grf->soc_con7, in board_debug_uart_init()
183 struct rk3399_grf_regs *grf; in board_init_f() local
235 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in board_init_f()
236 rk_clrreg(&grf->emmccore_con[11], 0x0ff); in board_init_f()
H A Drk322x-board.c35 struct rk322x_grf * const grf = (void *)GRF_BASE; in board_init() local
55 rk_clrsetreg(&grf->gpio1b_iomux, in board_init()
60 rk_clrsetreg(&grf->con_iomux, in board_init()
68 rk_clrsetreg(&grf->macphy_con[0], in board_init()
145 struct rk322x_grf *grf; in fastboot_set_reboot_flag() local
148 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in fastboot_set_reboot_flag()
150 writel(BOOT_FASTBOOT, &grf->os_reg[0]); in fastboot_set_reboot_flag()
/openbmc/u-boot/arch/arm/dts/
H A Drk3xxx.dtsi177 rockchip,grf = <&grf>;
223 grf: grf@20008000 { label
233 rockchip,grf = <&grf>;
250 rockchip,grf = <&grf>;
265 rockchip,grf = <&grf>;
320 rockchip,grf = <&grf>;
335 rockchip,grf = <&grf>;
350 rockchip,grf = <&grf>;
/openbmc/u-boot/arch/arm/mach-rockchip/rk3368/
H A Drk3368.c68 struct rk3368_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in mcu_init() local
71 rk_clrsetreg(&grf->soc_con14, MCU_SRAM_BASE_BIT31_BIT28_MASK, in mcu_init()
73 rk_clrsetreg(&grf->soc_con11, MCU_SRAM_BASE_BIT27_BIT12_MASK, in mcu_init()
75 rk_clrsetreg(&grf->soc_con14, MCU_EXSRAM_BASE_BIT31_BIT28_MASK, in mcu_init()
77 rk_clrsetreg(&grf->soc_con12, MCU_EXSRAM_BASE_BIT27_BIT12_MASK, in mcu_init()
79 rk_clrsetreg(&grf->soc_con14, MCU_EXPERI_BASE_BIT31_BIT28_MASK, in mcu_init()
81 rk_clrsetreg(&grf->soc_con13, MCU_EXPERI_BASE_BIT27_BIT12_MASK, in mcu_init()
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Drockchip,rk3328-grf-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/rockchip,rk3328-grf-gpio.yaml#
10 The Rockchip RK3328 General Register File (GRF) outputs only the
14 The GPIO node should be declared as the child of the GRF node.
30 const: rockchip,rk3328-grf-gpio
47 compatible = "rockchip,rk3328-grf-gpio";
/openbmc/u-boot/board/rockchip/evb_rv1108/
H A Devb_rv1108.c18 struct rv1108_grf *grf; in mach_cpu_init() local
37 node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf"); in mach_cpu_init()
38 grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg"); in mach_cpu_init()
41 rk_clrsetreg(&grf->gpio2d_iomux, in mach_cpu_init()
45 rk_clrreg(&grf->gpio3c_iomux, GPIO3C3_MASK | GPIO3C2_MASK); in mach_cpu_init()
/openbmc/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3328.c16 struct rk3328_grf_regs *grf; member
23 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3328_dmc_probe()
24 debug("%s: grf=%p\n", __func__, priv->grf); in rk3328_dmc_probe()
27 (phys_addr_t)&priv->grf->os_reg[2]); in rk3328_dmc_probe()
H A Dsdram_rk3128.c16 struct rk3128_grf *grf; member
23 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3128_dmc_probe()
24 debug("%s: grf=%p\n", __func__, priv->grf); in rk3128_dmc_probe()
27 (phys_addr_t)&priv->grf->os_reg[1]); in rk3128_dmc_probe()
/openbmc/u-boot/board/elgin/elgin_rv1108/
H A Delgin_rv1108.c19 struct rv1108_grf *grf; in mach_cpu_init() local
38 node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf"); in mach_cpu_init()
39 grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg"); in mach_cpu_init()
42 rk_clrsetreg(&grf->gpio2d_iomux, in mach_cpu_init()
46 rk_clrreg(&grf->gpio3c_iomux, GPIO3C3_MASK | GPIO3C2_MASK); in mach_cpu_init()
/openbmc/linux/drivers/net/ethernet/arc/
H A Demac_rockchip.c29 struct regmap *grf; member
55 err = regmap_write(emac->grf, emac->soc_data->grf_offset, data); in emac_rockchip_set_mac_speed()
57 pr_err("unable to apply speed %u to grf (%d)\n", speed, err); in emac_rockchip_set_mac_speed()
127 priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node, in emac_rockchip_probe()
128 "rockchip,grf"); in emac_rockchip_probe()
129 if (IS_ERR(priv->grf)) { in emac_rockchip_probe()
131 PTR_ERR(priv->grf)); in emac_rockchip_probe()
132 err = PTR_ERR(priv->grf); in emac_rockchip_probe()
187 err = regmap_write(priv->grf, priv->soc_data->grf_offset, data); in emac_rockchip_probe()
189 dev_err(dev, "unable to apply initial settings to grf (%d)\n", in emac_rockchip_probe()
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dinno-rk3036.txt10 - rockchip,grf : The phandle of grf device node.
17 rockchip,grf = <&grf>;
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Drockchip,px30-cru.yaml57 rockchip,grf:
60 Phandle to the syscon managing the "general register files" (GRF),
106 rockchip,grf = <&grf>;
116 rockchip,grf = <&grf>;

12345678